Dear Wolfgang Denk,
On Thursday, March 7, 2013 12:38:04 PM, Benoît Thébaudeau wrote:
Dear Wolfgang Denk,
On Thursday, March 7, 2013 7:57:13 AM, Wolfgang Denk wrote:
Dear Benoît Thébaudeau,
In message 1362596377-5827-15-git-send-email-benoit.thebaudeau@advansee.com you wrote:
- # ... and from configs defined from other configs
- s/="(CONFIG_[A-Za-z0-9_][A-Za-z0-9_]*)"/=$(\1)/;
Should we not remove the lower case letters here? Such are not supposed to be used in macro names.
I don't think so. They're indeed not supposed to be used, but there are perhaps exceptions somewhere, and it's not the purpose of this script to enforce such a rule. Also, note that lowercase letters are used in the main line filter of this script too.
But if this is a strong requirement from you to remove lowercase letters here, just tell me, and I'll make the change. In that case, should the main line filter be changed too?
I've just performed a quick search, and there are many exceptions:
CONFIG_100MHz CONFIG_200MHz CONFIG_266MHz CONFIG_300MHz CONFIG_44x CONFIG_4x CONFIG_4xx CONFIG_4xx_CONFIG_BLOCKSIZE CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET CONFIG_4xx_DCACHE CONFIG_50MHz CONFIG_5xx CONFIG_5xx_CONS_SCI1 CONFIG_5xx_CONS_SCI2 CONFIG_5xx_GCLK_FREQ CONFIG_66MHz CONFIG_74x CONFIG_74xx CONFIG_74xx_7xx CONFIG_75MHz CONFIG_75x CONFIG_7xx CONFIG_80MHz CONFIG_82xx_CONS_SMC1 CONFIG_82xx_CONS_SMC2 CONFIG_8xx CONFIG_8xx_BOOTDELAY CONFIG_8xx_BUSCLOCK CONFIG_8xx_CONS_ CONFIG_8xx_CONS_NONE CONFIG_8xx_CONS_SCC1 CONFIG_8xx_CONS_SCC2 CONFIG_8xx_CONS_SCC3 CONFIG_8xx_CONS_SCC4 CONFIG_8xx_CONS_SCCx CONFIG_8xx_CONS_SMC1 CONFIG_8xx_CONS_SMC2 CONFIG_8xx_CONS_SMCx CONFIG_8xx_CPUCLK_DEFAULT CONFIG_8xx_CPUCLOCK CONFIG_8xx_GCLK_FREQ CONFIG_8xx_OSCLK CONFIG_8xx_TFTP_MODE CONFIG_ARCH_GTA02_v1 CONFIG_ARCH_GTA02_v2 CONFIG_AT32UC3A0xxx CONFIG_BAB7xx CONFIG_BF50x CONFIG_BF51x CONFIG_BF52x CONFIG_BF54x CONFIG_BF60x CONFIG_BOARD_EARLY_INIT_f CONFIG_BUSMODE_60x CONFIG_CCLK_DIV_not_defined_properly CONFIG_CF_V4e CONFIG_CLKIN_66MHz CONFIG_CM41xx CONFIG_DB_CR826_J30x_ON CONFIG_DISPLAY_AER_xxxx CONFIG_EBC_PPC4xx_IBM_VER1 CONFIG_EB_CPUx9K2_H_ CONFIG_ETHER_ON_FCCx CONFIG_eTSEC_MDIO_BUS CONFIG_FEL8xx_AT CONFIG_galaxy5200_LOWBOOT CONFIG_IB62x0_H CONFIG_IDE_8xx_DIRECT CONFIG_IDE_8xx_PCCARD CONFIG_IP86x CONFIG_M520x CONFIG_M5301x CONFIG_M547x CONFIG_M548x CONFIG_MB86R0x CONFIG_MB86R0x_IOCLK CONFIG_MCF520x CONFIG_MCF5227x CONFIG_MCF523x CONFIG_MCF52x2 CONFIG_MCF5301x CONFIG_MCF532x CONFIG_MCF537x CONFIG_MCF5441x CONFIG_MCF5445x CONFIG_MCF547x_8x CONFIG_MPC512x_FEC CONFIG_MPC5xxx CONFIG_MPC5xxx_FEC CONFIG_MPC5xxx_FEC_MII10 CONFIG_MPC5xxx_FEC_MII100 CONFIG_MPC5xxx_FEC_SEVENWIRE CONFIG_MPC5xxx_MII10 CONFIG_MPC830x CONFIG_MPC831x CONFIG_MPC832x CONFIG_MPC834x CONFIG_MPC837x CONFIG_MPC83xx CONFIG_MPC85xx CONFIG_MPC86x CONFIG_MPC86xADS CONFIG_MPC86xx CONFIG_MPC8xxx_DISABLE_BPTR CONFIG_nand CONFIG_P3Mx CONFIG_PCI_4xx_PTM_OVERWRITE CONFIG_PDSP188x CONFIG_PHYx_ADDR CONFIG_PL01x_PORTS CONFIG_PPC4xx_DDR_AUTOCALIBRATION CONFIG_PPC4xx_DDR_METHOD_A CONFIG_PPC4xx_EMAC CONFIG_RTC_DS164x CONFIG_RTC_DS174x CONFIG_RTC_MPC8xx CONFIG_SACSng CONFIG_SDRAM_PPC4xx_DENALI_DDR2 CONFIG_SDRAM_PPC4xx_IBM_DDR CONFIG_SDRAM_PPC4xx_IBM_DDR2 CONFIG_SDRAM_PPC4xx_IBM_SDRAM CONFIG_SHARP_16x9 CONFIG_SHEEVA_88SV331xV5 CONFIG_spear300 CONFIG_spear310 CONFIG_spear320 CONFIG_SVM_SC8xx CONFIG_SYS_4xx_CHIP_21_405EX_NO_SECURITY CONFIG_SYS_4xx_CHIP_21_405EXr_NO_SECURITY CONFIG_SYS_4xx_CHIP_21_405EXr_SECURITY CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY CONFIG_SYS_4xx_CHIP_21_ERRATA CONFIG_SYS_4xx_GPIO_TABLE CONFIG_SYS_4xx_RESET_TYPE CONFIG_SYS_60x_BR CONFIG_SYS_60x_OR CONFIG_SYS_8xx_CPUCLK_MAX CONFIG_SYS_8xx_CPUCLK_MIN CONFIG_SYS_BCR_60x CONFIG_SYS_BRx_PRELIM CONFIG_SYS_CMA_CSn_ CONFIG_SYS_CSn_BASE CONFIG_SYS_CSn_CTRL CONFIG_SYS_CSn_MASK CONFIG_SYS_CSx_BASE CONFIG_SYS_CSx_RO CONFIG_SYS_CSx_SIZE CONFIG_SYS_CSx_WIDTH CONFIG_SYS_CSx_WS CONFIG_SYS_DM36x_AB1CR CONFIG_SYS_DM36x_AB2CR CONFIG_SYS_DM36x_AWCCR CONFIG_SYS_DM36x_DDR2_DDRPHYCR CONFIG_SYS_DM36x_DDR2_PBBPR CONFIG_SYS_DM36x_DDR2_SDBCR CONFIG_SYS_DM36x_DDR2_SDRCR CONFIG_SYS_DM36x_DDR2_SDTIMR CONFIG_SYS_DM36x_DDR2_SDTIMR2 CONFIG_SYS_DM36x_PERI_CLK_CTRL CONFIG_SYS_DM36x_PINMUX0 CONFIG_SYS_DM36x_PINMUX1 CONFIG_SYS_DM36x_PINMUX2 CONFIG_SYS_DM36x_PINMUX3 CONFIG_SYS_DM36x_PINMUX4 CONFIG_SYS_DM36x_PLL1_PLLDIV1 CONFIG_SYS_DM36x_PLL1_PLLDIV2 CONFIG_SYS_DM36x_PLL1_PLLDIV3 CONFIG_SYS_DM36x_PLL1_PLLDIV4 CONFIG_SYS_DM36x_PLL1_PLLDIV5 CONFIG_SYS_DM36x_PLL1_PLLDIV6 CONFIG_SYS_DM36x_PLL1_PLLDIV7 CONFIG_SYS_DM36x_PLL1_PLLDIV8 CONFIG_SYS_DM36x_PLL1_PLLDIV9 CONFIG_SYS_DM36x_PLL1_PLLM CONFIG_SYS_DM36x_PLL1_PREDIV CONFIG_SYS_DM36x_PLL2_PLLDIV1 CONFIG_SYS_DM36x_PLL2_PLLDIV2 CONFIG_SYS_DM36x_PLL2_PLLDIV3 CONFIG_SYS_DM36x_PLL2_PLLDIV4 CONFIG_SYS_DM36x_PLL2_PLLDIV5 CONFIG_SYS_DM36x_PLL2_PLLM CONFIG_SYS_DM36x_PLL2_PREDIV CONFIG_SYS_FLASH_LEGACY_256Kx8 CONFIG_SYS_FLASH_LEGACY_512Kx16 CONFIG_SYS_FLASH_LEGACY_512Kx8 CONFIG_SYS_FPGA_xxx CONFIG_SYS_GPIO_nPWRON CONFIG_SYS_GT_6426x CONFIG_SYS_I2c_INIT_MPC5XXX CONFIG_SYS_INIT_DCACHE_PBxAR CONFIG_SYS_INIT_DCACHE_PBxCR CONFIG_SYS_LBKs CONFIG_SYS_MB862xx_CCF CONFIG_SYS_MB862xx_MMR CONFIG_SYS_MPC512x_USB_ADDR CONFIG_SYS_MPC512x_USB_OFFSET CONFIG_SYS_MPC83xx_DMA_ADDR CONFIG_SYS_MPC83xx_DMA_OFFSET CONFIG_SYS_MPC83xx_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_OFFSET CONFIG_SYS_MPC83xx_USB_ADDR CONFIG_SYS_MPC83xx_USB_OFFSET CONFIG_SYS_MPC85xx_CPM_ADDR CONFIG_SYS_MPC85xx_CPM_OFFSET CONFIG_SYS_MPC85xx_DMA CONFIG_SYS_MPC85xx_DMA1_OFFSET CONFIG_SYS_MPC85xx_DMA2_OFFSET CONFIG_SYS_MPC85xx_DMA_ADDR CONFIG_SYS_MPC85xx_DMA_OFFSET CONFIG_SYS_MPC85xx_ECM_ADDR CONFIG_SYS_MPC85xx_ECM_OFFSET CONFIG_SYS_MPC85xx_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_OFFSET CONFIG_SYS_MPC85xx_ESPI_ADDR CONFIG_SYS_MPC85xx_ESPI_OFFSET CONFIG_SYS_MPC85xx_GPIO_ADDR CONFIG_SYS_MPC85xx_GPIO_OFFSET CONFIG_SYS_MPC85xx_GUTS_ADDR CONFIG_SYS_MPC85xx_GUTS_OFFSET CONFIG_SYS_MPC85xx_IFC_OFFSET CONFIG_SYS_MPC85xx_L2_ADDR CONFIG_SYS_MPC85xx_L2_OFFSET CONFIG_SYS_MPC85xx_LBC_OFFSET CONFIG_SYS_MPC85xx_PCI1_OFFSET CONFIG_SYS_MPC85xx_PCI2_OFFSET CONFIG_SYS_MPC85xx_PCIE CONFIG_SYS_MPC85xx_PCIE1_OFFSET CONFIG_SYS_MPC85xx_PCIE2_OFFSET CONFIG_SYS_MPC85xx_PCIE3_OFFSET CONFIG_SYS_MPC85xx_PCIE4_OFFSET CONFIG_SYS_MPC85xx_PCIX2_ADDR CONFIG_SYS_MPC85xx_PCIX2_OFFSET CONFIG_SYS_MPC85xx_PCIX_ADDR CONFIG_SYS_MPC85xx_PCIX_OFFSET CONFIG_SYS_MPC85xx_PIC_OFFSET CONFIG_SYS_MPC85xx_SATA CONFIG_SYS_MPC85xx_SATA1_ADDR CONFIG_SYS_MPC85xx_SATA1_OFFSET CONFIG_SYS_MPC85xx_SATA2_ADDR CONFIG_SYS_MPC85xx_SATA2_OFFSET CONFIG_SYS_MPC85xx_SERDES1_ADDR CONFIG_SYS_MPC85xx_SERDES1_OFFSET CONFIG_SYS_MPC85xx_SERDES2_ADDR CONFIG_SYS_MPC85xx_SERDES2_OFFSET CONFIG_SYS_MPC85xx_USB CONFIG_SYS_MPC85xx_USB1_OFFSET CONFIG_SYS_MPC85xx_USB1_PHY_ADDR CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET CONFIG_SYS_MPC85xx_USB2_OFFSET CONFIG_SYS_MPC85xx_USB2_PHY_ADDR CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET CONFIG_SYS_MPC85xx_USB_ADDR CONFIG_SYS_MPC85xx_USB_OFFSET CONFIG_SYS_MPC86xx_DMA_ADDR CONFIG_SYS_MPC86xx_DMA_OFFSET CONFIG_SYS_MPC86xx_PCI1_OFFSET CONFIG_SYS_MPC86xx_PCI2_OFFSET CONFIG_SYS_MPC86xx_PCIE1_OFFSET CONFIG_SYS_MPC86xx_PCIE2_OFFSET CONFIG_SYS_MPC86xx_PIC_OFFSET CONFIG_SYS_MPC8xxx_DDR2_ADDR CONFIG_SYS_MPC8xxx_DDR2_OFFSET CONFIG_SYS_MPC8xxx_DDR3_ADDR CONFIG_SYS_MPC8xxx_DDR3_OFFSET CONFIG_SYS_MPC8xxx_DDR4_ADDR CONFIG_SYS_MPC8xxx_DDR_ADDR CONFIG_SYS_MPC8xxx_DDR_OFFSET CONFIG_SYS_MPC8xxx_GUTS_ADDR CONFIG_SYS_MPC8xxx_PIC_ADDR CONFIG_SYS_MxMR_PTx CONFIG_SYS_NS87308_BADDR_0x CONFIG_SYS_ORx_PRELIM CONFIG_SYS_PxDAT CONFIG_SYS_PxDDR CONFIG_SYS_PxPAR CONFIG_SYS_QE_FW_IN_xxx CONFIG_SYS_SDRAM_BASE1xx CONFIG_SYS_SDRAM_tRC CONFIG_SYS_SDRAM_tRCD CONFIG_SYS_SDRAM_tRFC CONFIG_SYS_SDRAM_tRP CONFIG_SYS_SPI_UCODE_PATCh CONFIG_SYS_SRIOn_MEM_PHYS CONFIG_SYS_SRIOn_MEM_SIZE CONFIG_SYS_SRIOn_MEM_VIRT CONFIG_SYS_UECx_PHY_ADDR CONFIG_SYS_xRn_PRELIM CONFIG_TQM8xxL CONFIG_TQM8xxM CONFIG_USB_ETHER_xxx CONFIG_usbtty CONFIG_VIDEO_MB862xx CONFIG_VIDEO_MB862xx_ACCEL CONFIG_VIDEO_MB86R0xGDC
Best regards, Benoît