TPL offset 0xff704004 is unaligned address which is adding nearest 8-bytes for next instruction, So 0xff704004 is adding 0x20 for proper alignment which is causing the next instruction data 0xefffffff is moved.
Hexdump with overlaped bytes: ----------------------------- 0000000 0000 0000 0000 0000 0000 0000 0000 0000 0000010 0000 0000 0000 0000 0000 0000 ffff eaff
So, Fix the TEXT_BASE for proper aligned address 0xff704000
Signed-off-by: Jagan Teki jagan@amarulasolutions.com Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com --- Changes for v2: - Update commit message
arch/arm/mach-rockchip/Kconfig | 3 +++ configs/vyasa-rk3288_defconfig | 1 - 2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index d9218da64f..0adaed4367 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -77,6 +77,9 @@ if ROCKCHIP_RK3288 config TPL_LDSCRIPT default "arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds"
+config TPL_TEXT_BASE + default 0xff704000 + endif
config ROCKCHIP_RK3328 diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index 95c988c05c..24a955a94a 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -5,7 +5,6 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ROCKCHIP_RK3288=y -CONFIG_TPL_TEXT_BASE=0xff704004 CONFIG_TARGET_VYASA_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-vyasa"