Add support for system reset for rk3066 socs.
Signed-off-by: Paweł Jarosz paweljarosz3691@gmail.com Reviewed-by: Simon Glass sjg@chromium.org Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com --- Changes since v1: - updated to shifted masks
drivers/sysreset/Makefile | 1 + drivers/sysreset/sysreset_rk3066.c | 61 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 62 insertions(+) create mode 100644 drivers/sysreset/sysreset_rk3066.c
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile index a5200d3..7d4d0cd 100644 --- a/drivers/sysreset/Makefile +++ b/drivers/sysreset/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o ifndef CONFIG_SPL_BUILD obj-$(CONFIG_ROCKCHIP_RK3036) += sysreset_rk3036.o endif +obj-$(CONFIG_ROCKCHIP_RK3066) += sysreset_rk3066.o obj-$(CONFIG_ROCKCHIP_RK3188) += sysreset_rk3188.o obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o obj-$(CONFIG_ROCKCHIP_RK3328) += sysreset_rk3328.o diff --git a/drivers/sysreset/sysreset_rk3066.c b/drivers/sysreset/sysreset_rk3066.c new file mode 100644 index 0000000..b5dcb9a --- /dev/null +++ b/drivers/sysreset/sysreset_rk3066.c @@ -0,0 +1,61 @@ +/* + * (C) Copyright 2015 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <syscon.h> +#include <sysreset.h> +#include <asm/io.h> +#include <asm/arch/clock.h> +#include <asm/arch/cru_rk3066.h> +#include <asm/arch/grf_rk3066.h> +#include <asm/arch/hardware.h> +#include <linux/err.h> + +int rk3066_sysreset_request(struct udevice *dev, enum sysreset_t type) +{ + struct rk3066_cru *cru = rockchip_get_cru(); + struct rk3066_grf *grf; + + if (IS_ERR(cru)) + return PTR_ERR(cru); + + switch (type) { + case SYSRESET_WARM: + grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); + if (IS_ERR(grf)) + return -EPROTONOSUPPORT; + /* + * warm-reset keeps the remap value, + * so make sure it's disabled. + */ + rk_clrsetreg(&grf->soc_con0, + NOC_REMAP_MASK, 0 << NOC_REMAP_SHIFT); + + rk_clrreg(&cru->cru_mode_con, 0xffff); + writel(0xeca8, &cru->cru_glb_srst_snd_value); + break; + case SYSRESET_COLD: + rk_clrreg(&cru->cru_mode_con, 0xffff); + writel(0xfdb9, &cru->cru_glb_srst_fst_value); + break; + default: + return -EPROTONOSUPPORT; + } + + return -EINPROGRESS; +} + +static struct sysreset_ops rk3066_sysreset = { + .request = rk3066_sysreset_request, +}; + +U_BOOT_DRIVER(sysreset_rk3066) = { + .name = "rk3066_sysreset", + .id = UCLASS_SYSRESET, + .ops = &rk3066_sysreset, +};