HI,
Few little comments. CCed driver contributed delegate, may be they will help if I am missing any thing.
On Tue, May 28, 2013 at 6:48 PM, laurent vaudoit laurent.vaudoit@gmail.com wrote:
Hello all,
i have integrated soft_spi driver in u-boot, in order to communicate with a FRAM device, using some GPIO.
I use mode 0 of spi (CPHA=0, CPOL=0).
When i try to communicate with the device, i have a problem, none of my commands are answered.
Giving to an understnding how does it works, ignore if you know it already.
usually we have give an mode bit as 0, so the mode bit will check at driver level to get any change on clock phase and polarity level(CPHA and CPOL)
u-boot> sf probe 0 0 0 last argument assigns the global mode variable.
You checked with mode 0 or 1?
What exactly the issue log, means where it goes wrong? Does it on spi_xfer?, or spi_claim_bus?
After looking signals with scope, i see that if CPHA and CPOL are 0, there is a rising edge on the clock signal, before data is set on mosi signal.
So the device get a first byte in an "unknown state".
looking at the code, we can see that if CPHA is 0, we put a rising edge on clock before any data management.
I made work the communication by forcing CPHA to 1 but i think it is not good way.
What you made by default the CPHA is 0x1, did you make change on the spi_xfer?
Thanks, Jagan.
Is there something i don't understand?
thank you in advance for your answer.
Regards
Laurent Vaudoit
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