On 03/01/2013 03:32 PM, Tom Warren wrote:
Use the latest tables & code from our internal U-Boot repo. The SDMMC3_CD, CLK_LB_IN and CLK_LB_OUT offsets in the pingroup table were off by a few indices, causing the pinmux init code to write bad data to the PINMUX_AUX_ regs. This also enabled the lock bit, which made it impossible to reconfig the pads correctly for SDMMC3 (SD card on Dalmore) operation. Also fixes SPI_CS2_N, USB_VBUS_EN0, HDMI_CEC and UART2_RXD/TXD muxes.
Partially, Reviewed-by: Stephen Warren swarren@nvidia.com
At least the table in pinmux.c:tegra_soc_pingroups matches the kernel's list of pins in terms of pin name and register offsets. I didn't check any other aspect of the changes, but the changes are conceptually fine by me.
It might be nice to validate the entire of the pinmux driver tables and Dalmore configuration against the kernel's drivers/pinctrl/pinctrl-tegra114.c (and arch/arm/boot/dts/tegra114-dalmore.dts once pinctrl nodes are added there) some time.
diff --git a/arch/arm/cpu/tegra114-common/pinmux.c b/arch/arm/cpu/tegra114-common/pinmux.c
const struct tegra_pingroup_desc tegra_soc_pingroups[PINGRP_COUNT] = {
FYI, the JTAG_RTCK entry that already exists here isn't in the kernel's driver. That could be simply an oversight in the kernel driver though.
- PIN_RESERVED, /* Reserved by t114: 0x3388 - 0x3338c */
Nit: 0x3338c should be 0x338c.