This is the 2cd version of patchset to clean up clock manager code and store QSPI reference clock in kHz for SOCFPGA SOC64.
This patchset is extracted from "Add Intel Diamond Mesa SoC support" series. We are in preparation to support new Intel N5X (Diamond Mesa) SOC64 device and we would like to clean up some code before enable N5X device.
Patch status: Have changes: Patch 2 Other patches unchanged.
Detail changelog can find in commit message.
v1->v2: -------- Patch 2: - Rename mbox_qspi_set_controller_clk_hz function to cm_set_qspi_controller_clk_hz function and move to clock_manager.c. - Remove CLOCK_1K macro from socfpga_soc64_common.h - Sort include file list by alphabetical order in mailbox_s10.c
History: -------- [v1] https://patchwork.ozlabs.org/project/uboot/cover/20210315143643.33102-1-elly...
The first version of this patchset is extracted from "Add Intel Diamond Mesa SoC support" series. https://patchwork.ozlabs.org/project/uboot/cover/20201110064439.9683-1-elly....
This patchset has dependency on: -------- 1. arm: socfpga: Move Stratix10 and Agilex SPL common code https://patchwork.ozlabs.org/project/uboot/patch/20210315075916.26336-1-elly...
2. Restructure Stratix10 and Agilex handoff code https://patchwork.ozlabs.org/project/uboot/cover/20210315094329.30282-1-elly...
Siew Chin Lim (2): arm: socfpga: Move Stratix10 and Agilex clock manager common code arm: socfpga: Changed to store QSPI reference clock in kHz
arch/arm/mach-socfpga/clock_manager.c | 43 ++++++++++++++++++++-- arch/arm/mach-socfpga/clock_manager_agilex.c | 6 --- arch/arm/mach-socfpga/clock_manager_s10.c | 6 --- arch/arm/mach-socfpga/include/mach/clock_manager.h | 5 +++ .../mach-socfpga/include/mach/clock_manager_s10.h | 1 - .../include/mach/system_manager_soc64.h | 16 +++++++- arch/arm/mach-socfpga/mailbox_s10.c | 17 +++++---- 7 files changed, 69 insertions(+), 25 deletions(-)