
On Wednesday, July 08, 2015 at 04:53:32 AM, Simon Glass wrote:
Raspberry Pi uses a DWC2 USB controller and a SMSC USB Ethernet adaptor. Neither of these currently support driver model.
This series does the following:
- Move Raspberry Pi to use device tree control (u-boot-dtb.bin instead of u-boot.bin)
- Remove GPIO platform data (now uses device tree)
- Remove serial platform data (now uses device tree)
- Add 'ranges' support to simple-bus
- Convert the DWC2 USB driver to support driver model
- Convert the SMSC95XX USB Ethernet driver to support driver model
- Enable CONFIG_DM_ETH and CONFIG_DM_USB on Raspberry Pi
With Ethernet active the device list looks something like this:
U-Boot> dm tree Class Probed Name
root [ + ] root_driver simple_bus [ + ] |-- soc gpio [ ] | |-- gpio@7e200000 serial [ + ] | |-- uart@7e201000 usb [ + ] | `-- usb@7e980000 usb_hub [ + ] | `-- usb_hub usb_hub [ + ] | `-- usb_hub eth [ + ] | `-- smsc95xx_eth simple_bus [ ] `-- clocks
Raspberry Pi 2 is not converted as I do not have one to test at present.
Simon Glass (20): dm: net: Support usbethaddr environment variable dm: usb: Allow USB Ethernet whenever CONFIG_DM_ETH is not defined dm: usb: Add an errno.h header to usb_ether.c dm: usb: Prepare dwc2 driver for driver-model conversion dm: usb: Add driver-model support to dwc2 net: smsc95xx: Sort the include files net: smsc95xx: Rename AX_RX_URB_SIZE to RX_URB_SIZE net: smsc95xx: Correct the error numbers net: smsc95xx: Prepare for conversion to driver model net: smsc95xx: Add driver-model support dm: serial: Update binding for PL01x serial UART dm: Support address translation for simple-bus arm: rpi: Define CONFIG_TFTP_TSIZE to show tftp size info arm: rpi: Bring in kernel device tree files arm: rpi: Device tree modifications for U-Boot arm: rpi: Enable device tree control for Rasberry Pi arm: rpi: Drop the UART console platform data arm: rpi: Drop the GPIO platform data arm: rpi: Move to driver model for USB arm: rpi: Use driver model for Ethernet
I could really use the DM part of this patchset on SoCFPGA, can you maybe drop the rpi part and repost it, so that part can be mainlined please ?