Hi Bin,
On Mon, 20 Feb 2023 at 19:02, Jason Liu jason.hui.liu@nxp.com wrote:
-----Original Message----- From: Simon Glass sjg@chromium.org Sent: 2023年2月21日 3:49 To: U-Boot Mailing List u-boot@lists.denx.de Cc: Bin Meng bmeng.cn@gmail.com; Simon Glass sjg@chromium.org; AKASHI Takahiro takahiro.akashi@linaro.org; Andrew Scull ascull@google.com; Heinrich Schuchardt xypron.glpk@gmx.de; Ilias Apalodimas ilias.apalodimas@linaro.org; Jason Liu
John Keeping john@metanate.com; Marek Vasut marex@denx.de; Masahisa Kojima masahisa.kojima@linaro.org; Michal Suchanek msuchanek@suse.de; Pali Rohár pali@kernel.org; Pierre-Clément Tosi ptosi@google.com; Rasmus Villemoes rasmus.villemoes@prevas.dk; Stefan Roese sr@denx.de Subject: [PATCH 00/13] x86: Various minor enhancements for coreboot
This series includes some patches generated while getting U-Boot to boot
more
nicely on Brya, an Adler Lake Chromebook.
This includes:
- show the ACPI tables with 'acpi list'
- get the UART to work even if coreboot doesn't enable it
- show unimplemented sysinfo tags
- fix for keyboard not working
- fix for trying to set up PCI regions when the info is not available
- fix for looking at inaccessible memory to find the sysinfo table
Simon Glass (13): mtrr: Don't show an invalid CPU number x86: Adjust search range for sysinfo table input: Only reset the keyboard when running bare metal x86: coreboot: Allow ACPI tables to be recorded x86: coreboot: Collect the address of the ACPI tables x86: Allow locating UARTs by device ID pci: coreboot: Don't read regions when booting usb: Quieten a debug message x86: coreboot: Use a memory-mapped UART x86: coreboot: Document how to enable the debug UART x86: coreboot: Scan PCI after relocation x86: coreboot: Log function names and line numbers x86: coreboot: Show unimplemented sysinfo tags
This patch-set looks fine to me, thus,
Reviewed-by: Jason Liu jason.hui.liu@nxp.com
Any thoughts on this series please?
We need to drop the usb one as the bug has been fixed.
Regards, Simon