Hi Anup
Anup Patel anup@brainfault.org 於 2018年12月17日 週一 下午12:15寫道：
On Mon, Dec 17, 2018 at 7:21 AM Rick Chen rickchen36@gmail.com wrote:
Hi Anup
From: Anup Patel [mailto:anup@brainfault.org] Sent: Friday, December 14, 2018 5:23 PM To: Rick Jian-Zhi Chen(陳建志); Bin Meng; Lukas Auer Cc: Alexander Graf; Palmer Dabbelt; Atish Patra; Christoph Hellwig; U-Boot Mailing List Subject: Re: [PATCH v2 0/2] SiFive UART support
On Tue, Dec 11, 2018 at 8:32 PM Anup Patel anup@brainfault.org wrote:
This patchset adds SiFive UART driver for SiFive UART found on SiFive boards.
The driver is tested on QEMU sifive_u machine. In fact, with this patchset same U-Boot binary boots on QEMU virt machine and QEMU sifive_u machine in both M-mode and S-mode.
The patches are based upon latest RISC-V UBoot tree (git://git.denx.de/u-boot-riscv.git) at commit id 48cbf6246052de10d35b616b5efb2f783904a49d
Changes since v1:
- Fixed copyright header in SiFive UART driver
- Imply SIFIVE_SERIAL for QEMU emulation instead of enabling it in defconfigs.
Anup Patel (2): drivers: serial: Add SiFive UART driver riscv: qemu: Imply SIFIVE_SERIAL for emulation
board/emulation/qemu-riscv/Kconfig | 1 + drivers/serial/Kconfig | 13 ++ drivers/serial/Makefile | 1 + drivers/serial/serial_sifive.c | 191 +++++++++++++++++++++++++++++ 4 files changed, 206 insertions(+) create mode 100644 drivers/serial/serial_sifive.c
-- 2.17.1
Hi Rick,
The required QEMU fix has been submitted by Alistair Francis on QEMU mailing list. (QEMU PATCH subject "sifive_u: Set 'clock-frequency' DT property for SiFive UART")
Can you please consider this series for U-Boot v2019.01?
OK I will include yours in this PR.
I have send v3 of this patch. Please include that.
Yes. I fetch your v3 and apply to u-boot-riscv.git. Travis is verifying. Then I will send a PR later.
B.R Rick
Thanks, Anup