On Rockchip SoCs we typically have a main clock device that uses the Soc clock driver. There is also a fixed clock for the oscillator. Add a function to obtain the core clock.
Signed-off-by: Simon Glass sjg@chromium.org ---
arch/arm/include/asm/arch-rockchip/clock.h | 2 ++ arch/arm/mach-rockchip/rk3288/Makefile | 1 + arch/arm/mach-rockchip/rk3288/clk_rk3288.c | 17 +++++++++++++++++ 3 files changed, 20 insertions(+) create mode 100644 arch/arm/mach-rockchip/rk3288/clk_rk3288.c
diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h index 317e512..99cc18c 100644 --- a/arch/arm/include/asm/arch-rockchip/clock.h +++ b/arch/arm/include/asm/arch-rockchip/clock.h @@ -67,4 +67,6 @@ struct rk3288_grf;
void rkclk_configure_cpu(struct rk3288_cru *cru, struct rk3288_grf *grf);
+int rockchip_get_clk(struct udevice **devp); + #endif diff --git a/arch/arm/mach-rockchip/rk3288/Makefile b/arch/arm/mach-rockchip/rk3288/Makefile index 6f62375..82b00a1 100644 --- a/arch/arm/mach-rockchip/rk3288/Makefile +++ b/arch/arm/mach-rockchip/rk3288/Makefile @@ -4,6 +4,7 @@ # SPDX-License-Identifier: GPL-2.0+ #
+obj-y += clk_rk3288.o obj-y += reset_rk3288.o obj-y += sdram_rk3288.o obj-y += syscon_rk3288.o diff --git a/arch/arm/mach-rockchip/rk3288/clk_rk3288.c b/arch/arm/mach-rockchip/rk3288/clk_rk3288.c new file mode 100644 index 0000000..2099e34 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3288/clk_rk3288.c @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2015 Google, Inc + * Written by Simon Glass sjg@chromium.org + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <syscon.h> +#include <asm/arch/clock.h> + +int rockchip_get_clk(struct udevice **devp) +{ + return uclass_get_device_by_driver(UCLASS_CLK, + DM_GET_DRIVER(rockchip_rk3288_cru), devp); +}