Hi Peter,
On 8 July 2015 at 09:57, Peter Griffin peter.griffin@linaro.org wrote:
This patch adds the header files which will be used in the subsquent board / drivers to enable support for hi6220 hikey board.
Signed-off-by: Peter Griffin peter.griffin@linaro.org
arch/arm/include/asm/arch-hi6220/hi6220.h | 324 +++++++++++++++++++ .../include/asm/arch-hi6220/hi6220_regs_alwayson.h | 349 +++++++++++++++++++++ 2 files changed, 673 insertions(+) create mode 100644 arch/arm/include/asm/arch-hi6220/hi6220.h create mode 100644 arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h
diff --git a/arch/arm/include/asm/arch-hi6220/hi6220.h b/arch/arm/include/asm/arch-hi6220/hi6220.h new file mode 100644 index 0000000..3ddec91 --- /dev/null +++ b/arch/arm/include/asm/arch-hi6220/hi6220.h @@ -0,0 +1,324 @@ +/*
- (C) Copyright 2015 Linaro
- Peter Griffin peter.griffin@linaro.org
- SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef __HI6220_H__ +#define __HI6220_H__
+#include "hi6220_regs_alwayson.h"
+#define HI6220_MMC0_BASE 0xF723D000 +#define HI6220_MMC1_BASE 0xF723E000
+#define HI6220_PMUSSI_BASE 0xF8000000
+#define HI6220_PERI_BASE 0xF7030000
+#define PERI_SC_PERIPH_CTRL1 (HI6220_PERI_BASE + 0x000)
I think you should have:
struct peri_sc_regs { u32 ctrl1; u32 ctrl2; ... };
U-Boot uses structs for I/O access.
+#define PERI_CTRL1_ETR_AXI_CSYSREQ_N (1 << 0) +#define PERI_CTRL1_HIFI_INT_MASK (1 << 1) +#define PERI_CTRL1_HIFI_ALL_INT_MASK (1 << 2) +#define PERI_CTRL1_ETR_AXI_CSYSREQ_N_MSK (1 << 16) +#define PERI_CTRL1_HIFI_INT_MASK_MSK (1 << 17) +#define PERI_CTRL1_HIFI_ALL_INT_MASK_MSK (1 << 18)
+#define PERI_SC_PERIPH_CTRL2 (HI6220_PERI_BASE + 0x004)
+#define PERI_CTRL2_MMC_CLK_PHASE_BYPASS_EN_MMC0 (1 << 0) +#define PERI_CTRL2_MMC_CLK_PHASE_BYPASS_EN_MMC1 (1 << 2) +#define PERI_CTRL2_NAND_SYS_MEM_SEL (1 << 6) +#define PERI_CTRL2_G3D_DDRT_AXI_SEL (1 << 7) +#define PERI_CTRL2_GU_MDM_BBP_TESTPIN_SEL (1 << 8) +#define PERI_CTRL2_CODEC_SSI_MASTER_CHECK (1 << 9) +#define PERI_CTRL2_FUNC_TEST_SOFT (1 << 12) +#define PERI_CTRL2_CSSYS_TS_ENABLE (1 << 15) +#define PERI_CTRL2_HIFI_RAMCTRL_S_EMA (1 << 16) +#define PERI_CTRL2_HIFI_RAMCTRL_S_EMAW (1 << 20) +#define PERI_CTRL2_HIFI_RAMCTRL_S_EMAS (1 << 22) +#define PERI_CTRL2_HIFI_RAMCTRL_S_RET1N (1 << 26) +#define PERI_CTRL2_HIFI_RAMCTRL_S_RET2N (1 << 27) +#define PERI_CTRL2_HIFI_RAMCTRL_S_PGEN (1 << 28)
+#define PERI_SC_PERIPH_CTRL3 (HI6220_PERI_BASE + 0x008)
+#define PERI_CTRL3_HIFI_DDR_HARQMEM_ADDR (1 << 0) +#define PERI_CTRL3_HIFI_HARQMEMRMP_EN (1 << 12) +#define PERI_CTRL3_HARQMEM_SYS_MED_SEL (1 << 13) +#define PERI_CTRL3_SOC_AP_OCCUPY_GRP1 (1 << 14) +#define PERI_CTRL3_SOC_AP_OCCUPY_GRP2 (1 << 16) +#define PERI_CTRL3_SOC_AP_OCCUPY_GRP3 (1 << 18) +#define PERI_CTRL3_SOC_AP_OCCUPY_GRP4 (1 << 20) +#define PERI_CTRL3_SOC_AP_OCCUPY_GRP5 (1 << 22) +#define PERI_CTRL3_SOC_AP_OCCUPY_GRP6 (1 << 24)
+#define PERI_SC_PERIPH_CTRL4 (HI6220_PERI_BASE + 0x00c)
[snip]
Regards, Simon