Re: [U-Boot] [PATCH 11/55] exynos: dts: Sync up I2C ports with the kernel

10 Jul 2015

Hello Simon,
On 07/03/2015 02:15 AM, Simon Glass wrote:
...
The kernel uses upper case for I2C unit addresses. Follow the same
convention to reduce differences.
Signed-off-by: Simon Glass sjg@chromium.org
arch/arm/dts/exynos5.dtsi             | 34 ++++++++++++++++-----------------
  arch/arm/dts/exynos5250-arndale.dts   | 16 ++++++++--------
  arch/arm/dts/exynos5250-smdk5250.dts  | 21 ++++++++++----------
  arch/arm/dts/exynos5250-snow.dts      | 32 +++++++++++++++++--------------
  arch/arm/dts/exynos5250.dtsi          | 24 +++++++++++------------
  arch/arm/dts/exynos5420-peach-pit.dts |  8 ++++----
  arch/arm/dts/exynos5420-smdk5420.dts  |  4 ++--
  arch/arm/dts/exynos54xx.dtsi          | 36 +++++++++++++++++------------------
  arch/arm/dts/exynos5800-peach-pi.dts  |  8 ++++----
  9 files changed, 94 insertions(+), 89 deletions(-)

diff --git a/arch/arm/dts/exynos5.dtsi b/arch/arm/dts/exynos5.dtsi
index 238acb8..179584c 100644
--- a/arch/arm/dts/exynos5.dtsi
+++ b/arch/arm/dts/exynos5.dtsi
@@ -72,39 +72,39 @@
   	interrupts = <1 9 0xf04>;
   };

i2c@12c60000 {
#address-cells = <1>;


#size-cells = <0>;




i2c_0: i2c@12C60000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C60000 0x100>;
interrupts = <0 56 0>;


};

i2c@12c70000 {
#address-cells = <1>;
#size-cells = <0>;


};

i2c_1: i2c@12C70000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C70000 0x100>;
interrupts = <0 57 0>;


};

i2c@12c80000 {
#address-cells = <1>;
#size-cells = <0>;


};

i2c_2: i2c@12C80000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C80000 0x100>;
interrupts = <0 58 0>;


};

i2c@12c90000 {
#address-cells = <1>;
#size-cells = <0>;


};

i2c_3: i2c@12C90000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C90000 0x100>;
interrupts = <0 59 0>;
#address-cells = <1>;


#size-cells = <0>;

};


spi@12d20000 {


spi_0: spi@12d20000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,exynos-spi";

@@ -112,7 +112,7 @@
   	interrupts = <0 68 0>;
   };

spi@12d30000 {


spi_1: spi@12d30000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,exynos-spi";

@@ -120,7 +120,7 @@
   	interrupts = <0 69 0>;
   };

spi@12d40000 {


spi_2: spi@12d40000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,exynos-spi";

@@ -129,7 +129,7 @@
   	interrupts = <0 70 0>;
          };

spi@131a0000 {


spi_3: spi@131a0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,exynos-spi";

@@ -137,7 +137,7 @@
   	interrupts = <0 129 0>;
   };

spi@131b0000 {


spi_4: spi@131b0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,exynos-spi";

diff --git a/arch/arm/dts/exynos5250-arndale.dts b/arch/arm/dts/exynos5250-arndale.dts
index 21c0a21..031c622 100644
--- a/arch/arm/dts/exynos5250-arndale.dts
+++ b/arch/arm/dts/exynos5250-arndale.dts
@@ -15,14 +15,14 @@
   compatible = "samsung,arndale", "samsung,exynos5250";
aliases {

i2c0 = "/i2c@12c60000";


i2c1 = "/i2c@12c70000";


i2c2 = "/i2c@12c80000";


i2c3 = "/i2c@12c90000";


i2c4 = "/i2c@12ca0000";


i2c5 = "/i2c@12cb0000";


i2c6 = "/i2c@12cc0000";


i2c7 = "/i2c@12cd0000";




i2c0 = "/i2c@12C60000";


i2c1 = "/i2c@12C70000";


i2c2 = "/i2c@12C80000";


i2c3 = "/i2c@12C90000";


i2c4 = "/i2c@12CA0000";


i2c5 = "/i2c@12CB0000";


i2c6 = "/i2c@12CC0000";


i2c7 = "/i2c@12CD0000";

serial0 = "/serial@12C20000";
console = "/serial@12C20000";
};

diff --git a/arch/arm/dts/exynos5250-smdk5250.dts b/arch/arm/dts/exynos5250-smdk5250.dts
index 3cebfc2..636fec9 100644
--- a/arch/arm/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/dts/exynos5250-smdk5250.dts
@@ -11,20 +11,21 @@
/dts-v1/;
  #include "exynos5250.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
/ {
   model = "SAMSUNG SMDK5250 board based on EXYNOS5250";
   compatible = "samsung,smdk5250", "samsung,exynos5250";
aliases {

i2c0 = "/i2c@12c60000";


i2c1 = "/i2c@12c70000";


i2c2 = "/i2c@12c80000";


i2c3 = "/i2c@12c90000";


i2c4 = "/i2c@12ca0000";


i2c5 = "/i2c@12cb0000";


i2c6 = "/i2c@12cc0000";


i2c7 = "/i2c@12cd0000";




i2c0 = "/i2c@12C60000";


i2c1 = "/i2c@12C70000";


i2c2 = "/i2c@12C80000";


i2c3 = "/i2c@12C90000";


i2c4 = "/i2c@12CA0000";


i2c5 = "/i2c@12CB0000";


i2c6 = "/i2c@12CC0000";


i2c7 = "/i2c@12CD0000";

spi0 = "/spi@12d20000";
spi1 = "/spi@12d30000";
spi2 = "/spi@12d40000";

@@ -58,14 +59,14 @@
   	status = "disabled";
   };

i2c@12c70000 {


i2c@12C70000 {
soundcodec@1a {
	reg = <0x1a>;
	compatible = "wolfson,wm8994-codec";
};
};


i2c@12c60000 {


i2c@12C60000 {
pmic@9 {
	reg = <0x9>;
	compatible = "maxim,max77686";

diff --git a/arch/arm/dts/exynos5250-snow.dts b/arch/arm/dts/exynos5250-snow.dts
index e4b3dc2..9abe0b7 100644
--- a/arch/arm/dts/exynos5250-snow.dts
+++ b/arch/arm/dts/exynos5250-snow.dts
@@ -7,24 +7,27 @@

This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License version 2 as
published by the Free Software Foundation.

-*/

*/
/dts-v1/;


+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/input/input.h>
  #include "exynos5250.dtsi"
/ {
   model = "Google Snow";

compatible = "google,snow", "samsung,exynos5250";


compatible = "google,snow", "samsung,exynos5250", "samsung,exynos5";
aliases {



i2c0 = "/i2c@12c60000";


i2c1 = "/i2c@12c70000";


i2c2 = "/i2c@12c80000";


i2c3 = "/i2c@12c90000";


i2c4 = "/i2c@12ca0000";


i2c5 = "/i2c@12cb0000";


i2c6 = "/i2c@12cc0000";


i2c7 = "/i2c@12cd0000";




i2c0 = "/i2c@12C60000";


i2c1 = "/i2c@12C70000";


i2c2 = "/i2c@12C80000";


i2c3 = "/i2c@12C90000";


i2c4 = "/i2c@12CA0000";


i2c5 = "/i2c@12CB0000";


i2c6 = "/i2c@12CC0000";


i2c7 = "/i2c@12CD0000";

spi0 = "/spi@12d20000";
spi1 = "/spi@12d30000";
spi2 = "/spi@12d40000";

@@ -39,7 +42,7 @@
   	i2s = "/sound@3830000";
   };

i2c4: i2c@12ca0000 {


i2c4: i2c@12CA0000 {
cros_ec: cros-ec@1e {
	reg = <0x1e>;
	compatible = "google,cros-ec-i2c";

@@ -66,6 +69,7 @@
   	spi-max-frequency = <1000000>;
   	spi-deactivate-delay = <100>;

/* Snow did support SPI but the released version used I2C */

embedded-controller {
	compatible = "google,cros-ec-i2c";
	reg = <0x1e>;

@@ -85,7 +89,7 @@
   	status = "disabled";
   };

i2c@12cd0000 {


i2c@12CD0000 {
soundcodec@22 {
	reg = <0x22>;
	compatible = "maxim,max98095-codec";

@@ -105,8 +109,8 @@
   	};
   };

i2c@12c60000 {
pmic@9 {




i2c@12C60000 {
max77686@09 {
reg = <0x9>;
compatible = "maxim,max77686";

};

diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index ccbafe9..7eef3e3 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -47,36 +47,36 @@
   	interrupts = <0 47 0>;
   };

i2c@12ca0000 {
#address-cells = <1>;


#size-cells = <0>;




i2c_4: i2c@12CA0000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12CA0000 0x100>;
interrupts = <0 60 0>;


};

i2c@12cb0000 {
#address-cells = <1>;
#size-cells = <0>;


};

i2c_5: i2c@12CB0000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12CB0000 0x100>;
interrupts = <0 61 0>;


};

i2c@12cc0000 {
#address-cells = <1>;
#size-cells = <0>;


};

i2c_6: i2c@12CC0000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12CC0000 0x100>;
interrupts = <0 62 0>;


};

i2c@12cd0000 {
#address-cells = <1>;
#size-cells = <0>;


};


i2c_7: i2c@12CD0000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12CD0000 0x100>;
interrupts = <0 63 0>;

#address-cells = <1>;


#size-cells = <0>;

};
sound@3830000 {


diff --git a/arch/arm/dts/exynos5420-peach-pit.dts b/arch/arm/dts/exynos5420-peach-pit.dts
index 6fe762d..0f1002e 100644
--- a/arch/arm/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/dts/exynos5420-peach-pit.dts
@@ -25,7 +25,7 @@
   aliases {
   	serial0 = "/serial@12C30000";
   	console = "/serial@12C30000";

pmic = "/i2c@12ca0000";




pmic = "/i2c@12CA0000";

};
dmc {


@@ -49,7 +49,7 @@
   };
/* MAX77802 is on i2c bus 4 */

i2c@12ca0000 {


i2c@12CA0000 {
clock-frequency = <400000>;
power-regulator@9 {
	compatible = "maxim,max77802-pmic";

@@ -57,7 +57,7 @@
   	};
   };

i2c@12cd0000 { /* i2c7 */


i2c@12CD0000 { /* i2c7 */
clock-frequency = <100000>;
     soundcodec@20 {
            reg = <0x20>;

@@ -76,7 +76,7 @@
                  samsung,codec-type = "max98090";
          };

i2c@12e10000 { /* i2c9 */


i2c@12E10000 { /* i2c9 */
clock-frequency = <400000>;
             tpm@20 {
                     compatible = "infineon,slb9645tt";

diff --git a/arch/arm/dts/exynos5420-smdk5420.dts b/arch/arm/dts/exynos5420-smdk5420.dts
index 6855027..015ff15 100644
--- a/arch/arm/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/dts/exynos5420-smdk5420.dts
@@ -37,7 +37,7 @@
   };
/* s2mps11 is on i2c bus 4 */

i2c@12ca0000 {


i2c@12CA0000 {
#address-cells = <1>;
#size-cells = <0>;
pmic@66 {

@@ -82,7 +82,7 @@
   	samsung,codec-type = "wm8994";
   };

i2c@12c70000 {


i2c@12C70000 {
soundcodec@1a {
	reg = <0x1a>;
	compatible = "wolfson,wm8994-codec";

diff --git a/arch/arm/dts/exynos54xx.dtsi b/arch/arm/dts/exynos54xx.dtsi
index 31fabb1..bd3619d 100644
--- a/arch/arm/dts/exynos54xx.dtsi
+++ b/arch/arm/dts/exynos54xx.dtsi
@@ -14,17 +14,17 @@
   };
aliases {

i2c0 = "/i2c@12c60000";


i2c1 = "/i2c@12c70000";


i2c2 = "/i2c@12c80000";


i2c3 = "/i2c@12c90000";


i2c4 = "/i2c@12ca0000";


i2c5 = "/i2c@12cb0000";


i2c6 = "/i2c@12cc0000";


i2c7 = "/i2c@12cd0000";


i2c8 = "/i2c@12e00000";


i2c9 = "/i2c@12e10000";


i2c10 = "/i2c@12e20000";




i2c0 = "/i2c@12C60000";


i2c1 = "/i2c@12C70000";


i2c2 = "/i2c@12C80000";


i2c3 = "/i2c@12C90000";


i2c4 = "/i2c@12CA0000";


i2c5 = "/i2c@12CB0000";


i2c6 = "/i2c@12CC0000";


i2c7 = "/i2c@12CD0000";


i2c8 = "/i2c@12E00000";


i2c9 = "/i2c@12E10000";


i2c10 = "/i2c@12E20000";

pinctrl0 = &pinctrl_0;
pinctrl1 = &pinctrl_1;
pinctrl2 = &pinctrl_2;

@@ -42,7 +42,7 @@
   	xhci1 = "/xhci@12400000";
   };

i2c@12ca0000 {


i2c@12CA0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,exynos5-hsi2c";

@@ -50,7 +50,7 @@
   	interrupts = <0 60 0>;
   };

i2c@12cb0000 {


i2c@12CB0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,exynos5-hsi2c";

@@ -58,7 +58,7 @@
   	interrupts = <0 61 0>;
   };

i2c@12cc0000 {


i2c@12CC0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,exynos5-hsi2c";

@@ -66,7 +66,7 @@
   	interrupts = <0 62 0>;
   };

i2c@12cd0000 {


i2c@12CD0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,exynos5-hsi2c";

@@ -74,7 +74,7 @@
   	interrupts = <0 63 0>;
   };

i2c@12e00000 {


i2c@12E00000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,exynos5-hsi2c";

@@ -82,7 +82,7 @@
   	interrupts = <0 87 0>;
   };

i2c@12e10000 {


i2c@12E10000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,exynos5-hsi2c";

@@ -90,7 +90,7 @@
   	interrupts = <0 88 0>;
   };

i2c@12e20000 {


i2c@12E20000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,exynos5-hsi2c";

diff --git a/arch/arm/dts/exynos5800-peach-pi.dts b/arch/arm/dts/exynos5800-peach-pi.dts
index 176ce55..4e548f7 100644
--- a/arch/arm/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/dts/exynos5800-peach-pi.dts
@@ -25,7 +25,7 @@
   aliases {
   	serial0 = "/serial@12C30000";
   	console = "/serial@12C30000";

pmic = "/i2c@12ca0000";




pmic = "/i2c@12CA0000";

};
dmc {


@@ -49,7 +49,7 @@
   };
/* MAX77802 is on i2c bus 4 */

i2c@12ca0000 {


i2c@12CA0000 {
clock-frequency = <400000>;
power-regulator@9 {
	compatible = "maxim,max77802-pmic";

@@ -57,7 +57,7 @@
   	};
   };

i2c@12cd0000 { /* i2c7 */


i2c@12CD0000 { /* i2c7 */
clock-frequency = <100000>;
     soundcodec@20 {
            reg = <0x20>;

@@ -69,7 +69,7 @@
                  samsung,codec-type = "max98090";
          };

i2c@12e10000 { /* i2c9 */


i2c@12E10000 { /* i2c9 */
clock-frequency = <400000>;
             tpm@20 {
                     compatible = "infineon,slb9645tt";

Acked-by: Przemyslaw Marczak p.marczak@samsung.com
Best regards
-- 
Przemyslaw Marczak
Samsung R&D Institute Poland
Samsung Electronics
p.marczak@samsung.com

    