Re: [RESEND RFC PATCH v2 4/5] ARM: dts: stm32: support display on stm32f469-disco board

On 11/30/23 15:40, Dario Binacchi wrote:

Add support to Orise Tech OTM8009A display on stm32f469-disco board.

It was necessary to retrieve the framebuffer address from the device tree because the address returned by the video-uclass driver pointed to a memory area that was not usable.

Furthermore, unlike Linux, the DSI driver requires the LTDC clock to be properly probed. Hence, the changes made to the DSI node in stm32f469-disco-u-boot.dtsi.

Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com

---

Changes in v2:

• Add DRAM_SIZE macro.
• Fix frame buffer allocation function so that it is backward compatible with boards other than the one it was introduced for (i. e. stm32f469-disco). Tested on stm32f469-disco and stm32mp157f-dk2 boards.

arch/arm/dts/stm32f469-disco-u-boot.dtsi | 4 +++ configs/stm32f469-discovery_defconfig | 13 ++++++++++ drivers/video/stm32/stm32_ltdc.c | 31 ++++++++++++++++++++++++ 3 files changed, 48 insertions(+)

diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi b/arch/arm/dts/stm32f469-disco-u-boot.dtsi index 8e781c5a7b23..47ba9fa4a783 100644 --- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi @@ -92,7 +92,9 @@

&dsi { clocks = <&rcc 0 STM32F4_APB2_CLOCK(DSI)>,

•  <&rcc 0 STM32F4_APB2_CLOCK(LTDC)>,
  

  <&clk_hse>;
• clock-names = "pclk", "px_clk", "ref";

};

&gpioa { @@ -140,6 +142,8 @@ };

&ltdc {

• bootph-all;
• clocks = <&rcc 0 STM32F4_APB2_CLOCK(LTDC)>;

};

diff --git a/configs/stm32f469-discovery_defconfig b/configs/stm32f469-discovery_defconfig index 21c5498466cd..85e795e83e7d 100644 --- a/configs/stm32f469-discovery_defconfig +++ b/configs/stm32f469-discovery_defconfig @@ -21,6 +21,7 @@ CONFIG_CMD_GPT=y # CONFIG_RANDOM_UUID is not set CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIMER=y # CONFIG_ISO_PARTITION is not set @@ -40,3 +41,15 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y +CONFIG_VIDEO=y +CONFIG_BACKLIGHT_GPIO=y +CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y +CONFIG_VIDEO_STM32=y +CONFIG_VIDEO_STM32_DSI=y +CONFIG_VIDEO_STM32_MAX_XRES=480 +CONFIG_VIDEO_STM32_MAX_YRES=800 +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y +CONFIG_BMP_32BPP=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c index 6fd90e33919d..9054db1d78b3 100644 --- a/drivers/video/stm32/stm32_ltdc.c +++ b/drivers/video/stm32/stm32_ltdc.c @@ -495,6 +495,33 @@ static void stm32_ltdc_set_layer1(struct stm32_ltdc_priv *priv, ulong fb_addr) setbits_le32(priv->regs + LTDC_L1CR, LXCR_LEN); }

+#if IS_ENABLED(CONFIG_TARGET_STM32F469_DISCOVERY) +static int stm32_ltdc_alloc_fb(struct udevice *dev) +{ +#define SDRAM_SIZE 0x1000000 /* 128Mbit = 16 Mbyte = 0x1000000 */

Hi Dario,

Sorry for the delay

The SDRAM_SIZE can be retrieve using gd->ram_size, i propose to replace by this : u32 sdram_size = gd->ram_size;

• struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
• phys_addr_t cpu;
• dma_addr_t bus;
• u64 dma_size;
• int ret;
• ret = dev_get_dma_range(dev, &cpu, &bus, &dma_size);
• if (ret) {

• dev_err(dev, "failed to get dma address\n");
  

• return ret;
  

• }
• uc_plat->base = bus + SDRAM_SIZE - ALIGN(uc_plat->size, uc_plat->align);
• return 0;

+} +#else +static inline int stm32_ltdc_alloc_fb(struct udevice *dev) +{

• /* Delegate framebuffer allocation to video-uclass */
• return 0;

+} +#endif

static int stm32_ltdc_probe(struct udevice *dev) { struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev); @@ -605,6 +632,10 @@ static int stm32_ltdc_probe(struct udevice *dev) priv->crop_h = timings.vactive.typ; priv->alpha = 0xFF;

• ret = stm32_ltdc_alloc_fb(dev);
• if (ret)

• return ret;
  

• dev_dbg(dev, "%dx%d %dbpp frame buffer at 0x%lx\n", timings.hactive.typ, timings.vactive.typ, VNBITS(priv->l2bpp), uc_plat->base);

Can you split this patch in 2 parts: _ DTS _ LTDC driver update

Thanks Patrice