Hi Simon,
在 2017年02月24日 00:19, Simon Glass 写道:
Hi Nickey,
On 22 February 2017 at 23:56, Nickey.Yang nickey.yang@rock-chips.com wrote:
Hi Simon,
在 2017年02月23日 11:52, Simon Glass 写道:
Hi,
On 11 January 2017 at 22:08, Simon Glass sjg@chromium.org wrote:
On 28 December 2016 at 23:01, Nickey Yang nickey.yang@rock-chips.com wrote:
Correct mpixelclock errors in rockchip_phy_config[] and rockchip_mpll_cfg[].
Signed-off-by: Nickey Yang nickey.yang@rock-chips.com
drivers/video/rockchip/rk_hdmi.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-)
Applied to u-boot-rockchip, thanks!
I only just noticed, but this patch breaks HDMI output on firefly. Can you please take a look? What does this patch actually fix?
Regards, Simon
You can add
printf("---YYS mpll.cpce = %x \n",rockchip_mpll_cfg[i].cpce); printf("---YYS mpll.gmp = %x \n",rockchip_mpll_cfg[i].gmp); printf("---YYS mpll.curr = %x \n",rockchip_mpll_cfg[i].curr);in hdmi_phy_configure(rk_hdmi.c line 409), all of those value will be 0 without this patch. We want to get those different value by near clock settings between rockchip_mpll_cfg[] in fact.
Yes it makes sense
by the way,HDMI output on firefly will work well when reset this patch?
Yes it works when I revert.
Regards, Simon
I am sorry for my mistake. There is one "0" too many in 83500000 mpixelclock in rockchip_mpll_cfg[]. I have send new patch rockchip: video: fix 83500000 clock mistake in rockchip HDMI to fix it.
Regards, Nickey