DESCRIPTION:
Existing getdcr and setdcr monitor functions don't allow indirect access to PPC440 registers in one step. It's still possible theoretically use setdcr to write offset into correct address DCRN and then read/write from data DCRN, but that doesn't work if address got updated in the middle. For instance, I never could read value of SDR0_PINSTP (address/data DCRNs 0xE/0xF, offset 0x40) - immediately after me somebody changed address DCRN to 0x20.
The solution is to implement new special functions getidcr/setidcr for indirect access with following format:
getidcr adr_dcrn[.dat_dcrn] offset setidcr adr_dcrn[.dat_dcrn] offset value
dat_dcrn will be set adr_dcrn+1 if omitted.
Examples (Yosemite PPC440EP board has been used):
1. Read SDR0_PINSTP:
=> getidcr e 40 000e.000f-0040 Read e0000000
2. Read SDR0_CUST0, update it and read back:
=> getidcr e 4000 000e.000f-4000 Read 40082350
=> setidcr e.f 4000 50082350 000e.000f-4000 Write 50082350
=> getidcr e 4000 000e.000f-4000 Read 50082350
CHANGELOG entry:
* Add monitor functions for indirect access to PPC440 registers via Data Control Register (DCR).
PATCH: (diff file ppc440dcr.txt attached).
Signed-off-by: Leonid Baryudin leonid@a-k-a.net