12 Aug
2015
12 Aug
'15
9:15 p.m.
Hi Peng,
On Wed, Aug 12, 2015 at 4:40 AM, Peng Fan Peng.Fan@freescale.com wrote:
The MIB RAM and FIFO receive start register does not exist on i.MX6UL. Accessing these register will cause enet not work well.
Signed-off-by: Peng Fan Peng.Fan@freescale.com Signed-off-by: Fugang Duan B38611@freescale.com Cc: Joe Hershberger joe.hershberger@ni.com Cc: Stefano Babic sbabic@denx.de
Looks reasonable to me.
Reviewed-by: Joe Hershberger joe.hershberger@ni.com