From: Taylor Hutt thutt@chromium.org
Update the assignment of various physical memory buffers used by the SATA controller to explicitly be denoted as physical addresses.
The memory is identity-mapped, so these function calls are a nop, but they provide good semantic documentation for any maintainers.
The return value of virt_to_phys() is 'unsigned long'. On machines where sizeof(unsigned long) != sizeof(pointer), a cast through (uintptr_t) is needed to appease the compiler due to the potential of losing the upper 32 bits of the address.
In compilation this scenario, a physical address could be 64-bits, yet the C pointer environment only allows 32-bit addresses; the constraint is that pointers cannot address more than 4Gb of memory and if virt_to_phys() ever returns an out-of-range value for the physical address, there are issues with emmory mapping which must be solved. However, since the memory is identify mappeed, there is no problem introducing the cast: the original pointer will reside in 32-bits, so the physical address will also be within in 32-bits.
Signed-off-by: Taylor Hutt thutt@chromium.org Signed-off-by: Simon Glass sjg@chromium.org ---
drivers/block/ahci.c | 10 ++++++---- 1 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c index 20c5336..00de086 100644 --- a/drivers/block/ahci.c +++ b/drivers/block/ahci.c @@ -431,25 +431,27 @@ static int ahci_port_start(u8 port) * First item in chunk of DMA memory: 32-slot command table, * 32 bytes each in size */ - pp->cmd_slot = (struct ahci_cmd_hdr *)mem; + pp->cmd_slot = + (struct ahci_cmd_hdr *)(uintptr_t)virt_to_phys((void *)mem); debug("cmd_slot = 0x%x\n", (unsigned)pp->cmd_slot); mem += (AHCI_CMD_SLOT_SZ + 224);
/* * Second item: Received-FIS area */ - pp->rx_fis = mem; + pp->rx_fis = virt_to_phys((void *)mem); mem += AHCI_RX_FIS_SZ;
/* * Third item: data area for storing a single command * and its scatter-gather table */ - pp->cmd_tbl = mem; + pp->cmd_tbl = virt_to_phys((void *)mem); debug("cmd_tbl_dma = 0x%x\n", pp->cmd_tbl);
mem += AHCI_CMD_TBL_HDR; - pp->cmd_tbl_sg = (struct ahci_sg *)mem; + pp->cmd_tbl_sg = + (struct ahci_sg *)(uintptr_t)virt_to_phys((void *)mem);
writel_with_flush((u32) pp->cmd_slot, port_mmio + PORT_LST_ADDR);