Hi Simon,
On Monday, November 30, 2015 04:17:07 PM you wrote:
if (((u32)usart & STM32_BUS_MASK) == STM32_APB1PERIPH_BASE)setbits_le32(&STM32_RCC->apb1enr,usart_port_rcc_pairs[usart_port][1]);else if (((u32)usart & STM32_BUS_MASK) == STM32_APB2PERIPH_BASE)setbits_le32(&STM32_RCC->apb2enr,usart_port_rcc_pairs[usart_port][1]);Is this some sort of pinmux setting? Shouldn't you add the required setting to the platdata instead of comparing against a physical address?
This is the clock gating. The problem is that depending on which bus the peripheral sits on (e.g. APB1, APB2), different register will be used to enable peripheral's clock. I think figuring out the bus within the driver (at least until there is a proper clk driver) is better than relying on board/dt to provide the correct data. At later stage I plan to move clock gating code out of drivers to clk driver, but even there I think this physical address <-> bus lookup could be used.
Regarding other points, thanks for the review - I will send v2 shortly.
/Kamil