This series brings in interrupt support for Minnowmax, so that PCI interrupts are correctly set up for Linux. It also includes a few small improvements to the PCI driver model implementation and tidies up some nits in the code.
The existing pirq routing code does not seem to support the Atom used in the Minnowmax. I'd like to figure that out before applying the RFC patch.
Simon Glass (15): pci: Add a constant for an invalid interrupt pci: Indicate prefetchable memory allocate when debugging dm: Add a return value comment to device_get_child() dm: pci: Provide friendly config access functions dm: pci: Add a way to iterate through all PCI devices x86: Move Chrome OS options to defconfig x86: Move CONFIG_X86_SERIAL to Kconfig x86: Re-order efi-x86_defconfig x86: Drop CONFIG_DCACHE_RAM_MRC_VAR_SIZE from header file x86: dts: Fix typo in intel,irq-router.txt x86: Tidy up the PIRQ routing code a little x86: Split out fsp_init_phase_pci() code into a new function x86: minnowmax: Drop the old PCI settings RFC: x86: minnowmax: Add interrupt routing setup x86: Update README to explain booting Ubuntu on Minnowmax
arch/x86/cpu/baytrail/valleyview.c | 492 +++++++++++++++++++++ arch/x86/cpu/irq.c | 40 +- arch/x86/dts/minnowmax.dts | 28 ++ arch/x86/include/asm/fsp/fsp_support.h | 7 + arch/x86/lib/fsp/fsp_common.c | 11 +- configs/chromebook_link_defconfig | 3 + configs/chromebox_panther_defconfig | 3 + configs/efi-x86_defconfig | 10 +- doc/README.x86 | 275 ++++++++++++ doc/device-tree-bindings/misc/intel,irq-router.txt | 4 +- drivers/pci/pci-uclass.c | 134 ++++++ drivers/pci/pci.c | 3 +- drivers/pci/pci_auto.c | 5 +- drivers/serial/Kconfig | 10 + include/configs/crownbay.h | 1 - include/configs/galileo.h | 2 - include/configs/minnowmax.h | 14 +- include/configs/qemu-x86.h | 2 - include/configs/x86-chromebook.h | 6 - include/dm/device.h | 2 + include/pci.h | 44 ++ 21 files changed, 1032 insertions(+), 64 deletions(-)