On Thursday, December 19, 2013 at 01:54:56 AM, Kuo-Jung Su wrote:
2013/12/18 Marek Vasut marex@denx.de:
On Wednesday, December 18, 2013 at 08:24:48 AM, Kuo-Jung Su wrote:
From: Kuo-Jung Su dantesu@faraday-tech.com
Since hardware revision 1.11.0, the following interrupt status registers
are now write-1-clear (w1c):
What did they look like before ?
They were r/w registers. i.e., software must write a zero to clear the status. I'll add the comment in next version.
OK.
- Interrupt Source Group 0 Register (0x144) (EP0 Abort: BIT5)
- Interrupt Source Group 2 Register (0x14C) (All bits)
Signed-off-by: Kuo-Jung Su dantesu@faraday-tech.com CC: Marek Vasut marex@denx.de
drivers/usb/gadget/fotg210.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/gadget/fotg210.c b/drivers/usb/gadget/fotg210.c index 6e19db1..e3a61cc 100644 --- a/drivers/usb/gadget/fotg210.c +++ b/drivers/usb/gadget/fotg210.c @@ -847,8 +847,11 @@ int usb_gadget_handle_interrupts(void)
/* CX interrupts */ if (gisr & GISR_GRP0) { st = readl(®s->gisr0);+#ifdef CONFIG_USB_GADGET_FOTG210_ISRW1C
Can we not get rid of this ifdef somehow please ? Like detect the revision on- the-fly and handle the bit accordingly or such ?
Unfortunately there is no revision id register in this hardware, so I have to do it manually.
So what would happen if you write 1, then write 0 into them ? ;-) Won't that handle both cases? Writing one will make sure the clean them on new hardware, writing zero afterwards will clean them on old hardware.
Best regards, Marek Vasut