To properly operate the Nano with LPDDR4 at 1.6GHz, the voltage needs to be adjusted before DDR is initialized. Enable the PMIC in SPL to do this.
Signed-off-by: Adam Ford aford173@gmail.com
diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig index 98a75d4950..fda545a9ad 100644 --- a/configs/imx8mn_beacon_2g_defconfig +++ b/configs/imx8mn_beacon_2g_defconfig @@ -121,6 +121,7 @@ CONFIG_PINCTRL_IMX8M=y CONFIG_DM_PMIC=y # CONFIG_SPL_PMIC_CHILDREN is not set CONFIG_DM_PMIC_BD71837=y +CONFIG_SPL_DM_PMIC_BD71837=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_BD71837=y CONFIG_DM_REGULATOR_FIXED=y diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index 271578985f..0ffcbcb475 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -125,6 +125,7 @@ CONFIG_PINCTRL_IMX8M=y CONFIG_DM_PMIC=y # CONFIG_SPL_PMIC_CHILDREN is not set CONFIG_DM_PMIC_BD71837=y +CONFIG_SPL_DM_PMIC_BD71837=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_BD71837=y CONFIG_DM_REGULATOR_FIXED=y diff --git a/configs/imx8mn_beacon_fspi_defconfig b/configs/imx8mn_beacon_fspi_defconfig index 6da2182eb3..94d069cbfa 100644 --- a/configs/imx8mn_beacon_fspi_defconfig +++ b/configs/imx8mn_beacon_fspi_defconfig @@ -125,6 +125,7 @@ CONFIG_PINCTRL_IMX8M=y CONFIG_DM_PMIC=y # CONFIG_SPL_PMIC_CHILDREN is not set CONFIG_DM_PMIC_BD71837=y +CONFIG_SPL_DM_PMIC_BD71837=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_BD71837=y CONFIG_DM_REGULATOR_FIXED=y