Add initial reset driver for Allwinner A10/A20.
Implement reset deassert and assert functions for USB OHCI, EHCI, OTG and PHY bus reset and clock registers.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- drivers/reset/sunxi/Kconfig | 7 +++ drivers/reset/sunxi/Makefile | 1 + drivers/reset/sunxi/reset_a10.c | 95 +++++++++++++++++++++++++++++++++ 3 files changed, 103 insertions(+) create mode 100644 drivers/reset/sunxi/reset_a10.c
diff --git a/drivers/reset/sunxi/Kconfig b/drivers/reset/sunxi/Kconfig index 5c3b79eb76..523201a4e9 100644 --- a/drivers/reset/sunxi/Kconfig +++ b/drivers/reset/sunxi/Kconfig @@ -9,6 +9,13 @@ config RESET_SUNXI
if RESET_SUNXI
+config RESET_SUN4I_A10 + bool "Reset driver for Allwinner A10/A20" + default MACH_SUN4I || MACH_SUN7I + help + This enables common reset driver support for platforms based + on Allwinner A10/A20 SoC. + config RESET_SUN8I_H3 bool "Reset driver for Allwinner H3/H5" default MACH_SUNXI_H3_H5 diff --git a/drivers/reset/sunxi/Makefile b/drivers/reset/sunxi/Makefile index 6e4273b344..6dc0520b6a 100644 --- a/drivers/reset/sunxi/Makefile +++ b/drivers/reset/sunxi/Makefile @@ -4,5 +4,6 @@ # SPDX-License-Identifier: GPL-2.0+ #
+obj-$(CONFIG_RESET_SUN4I_A10) += reset_a10.o obj-$(CONFIG_RESET_SUN8I_H3) += reset_h3.o obj-$(CONFIG_RESET_SUN50I_A64) += reset_a64.o diff --git a/drivers/reset/sunxi/reset_a10.c b/drivers/reset/sunxi/reset_a10.c new file mode 100644 index 0000000000..d964ea42e8 --- /dev/null +++ b/drivers/reset/sunxi/reset_a10.c @@ -0,0 +1,95 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2018 Amarula Solutions B.V. + * Author: Jagan Teki jagan@amarulasolutions.com + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <reset-uclass.h> +#include <asm/io.h> +#include <dm/lists.h> +#include <dt-bindings/reset/sun4i-a10-ccu.h> + +struct a10_reset_priv { + void *base; +}; + +static int a10_reset_request(struct reset_ctl *reset_ctl) +{ + debug("%s(#%ld)\n", __func__, reset_ctl->id); + + /* check dt-bindings/reset/sun4i-a10-ccu.h for max id */ + if (reset_ctl->id > 22) + return -EINVAL; + + return 0; +} + +static int a10_reset_free(struct reset_ctl *reset_ctl) +{ + debug("%s(#%ld)\n", __func__, reset_ctl->id); + + return 0; +} + +static int a10_reset_assert(struct reset_ctl *reset_ctl) +{ + struct a10_reset_priv *priv = dev_get_priv(reset_ctl->dev); + + debug("%s(#%ld)\n", __func__, reset_ctl->id); + + switch (reset_ctl->id) { + case RST_USB_PHY0: + case RST_USB_PHY1: + case RST_USB_PHY2: + clrbits_le32(priv->base + 0x0cc, BIT(reset_ctl->id)); + return 0; + default: + debug("%s (RST#%ld) unhandled\n", __func__, reset_ctl->id); + return -ENODEV; + } +} + +static int a10_reset_deassert(struct reset_ctl *reset_ctl) +{ + struct a10_reset_priv *priv = dev_get_priv(reset_ctl->dev); + + debug("%s(#%ld)\n", __func__, reset_ctl->id); + + switch (reset_ctl->id) { + case RST_USB_PHY0: + case RST_USB_PHY1: + case RST_USB_PHY2: + setbits_le32(priv->base + 0x0cc, BIT(reset_ctl->id)); + return 0; + default: + debug("%s (RST#%ld) unhandled\n", __func__, reset_ctl->id); + return -ENODEV; + } +} + +struct reset_ops a10_reset_ops = { + .request = a10_reset_request, + .free = a10_reset_free, + .rst_assert = a10_reset_assert, + .rst_deassert = a10_reset_deassert, +}; + +static int a10_reset_probe(struct udevice *dev) +{ + struct a10_reset_priv *priv = dev_get_priv(dev); + + priv->base = dev_read_addr_ptr(dev); + + return 0; +} + +U_BOOT_DRIVER(reset_sun4i_a10) = { + .name = "sun4i_a10_reset", + .id = UCLASS_RESET, + .ops = &a10_reset_ops, + .probe = a10_reset_probe, + .priv_auto_alloc_size = sizeof(struct a10_reset_priv), +};