On Thu, Oct 20, 2022 at 11:10:24PM +0100, Andre Przywara wrote:

The DT used for Calxeda Highbank and Midway systems exposes a "system registers" block, modeled as a DT subnode. This includes several clocks, including the two fixed clocks for the main oscillator and timer.

So far U-Boot was ignorant of this special construct (a "clocks" node within the "hb-sregs" node), as it didn't need the PLL clocks in there. But that also meant we lost the fixed clocks, which form the base for the UART baudrate generator and also the SP804 timer.

To allow the generic PL011 and SP804 driver to read the clock rate, add a simple bus driver, which triggers the DT node discovery inside this special node. As we only care about the fixed clocks (we don't have drivers for the PLLs anyway), just ignore the address translation (for now).

The binding is described in bindings/arm/calxeda/hb-sregs.yaml, the DT snippet in question looks like:

======================= sregs@fff3c000 { compatible = "calxeda,hb-sregs"; reg = <0xfff3c000 0x1000>;

clocks {
	#address-cells = <1>;
	#size-cells = <0>;

	osc: oscillator {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <33333000>;
	};
	....
};

};

Signed-off-by: Andre Przywara andre.przywara@arm.com

Applied to u-boot/master, thanks!