
Hi Vlad,
On Tue, 2016-11-22 at 18:54 +0300, Vlad Zakharov wrote:
This commit replaces legacy timer code with usage of arc timer driver.
Also it adds timer0 device tree node with corresponding "clock-frequency" property.
Therefore we remove legacy CONFIG_SYS_TIMER_RATE config symbol that is not longer required.
Furthermore the commit selects CONFIG_TIMER and CONFIG_ARC_TIMER by default when selecting ARC architecture.
Signed-off-by: Vlad Zakharov vzakhar@synopsys.com Reviewed-by: Simon Glass sjg@chromium.org
Changes v3..v4: - Remove CONFIG_SYS_TIMER_RATE not only from "axs10x.h" but also from "nsim.h" and "tb100.h".
arch/Kconfig | 2 ++ arch/arc/dts/skeleton.dtsi | 6 ++++++ arch/arc/lib/Makefile | 1 - arch/arc/lib/timer.c | 24 ------------------------ include/configs/axs10x.h | 2 -- include/configs/nsim.h | 5 ----- include/configs/tb100.h | 5 ----- 7 files changed, 8 insertions(+), 37 deletions(-) delete mode 100644 arch/arc/lib/timer.c
diff --git a/arch/Kconfig b/arch/Kconfig index ffc7b45..56fa70e 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -12,6 +12,8 @@ config ARC bool "ARC architecture" select HAVE_PRIVATE_LIBGCC select SUPPORT_OF_CONTROL
- select TIMER
- select ARC_TIMER
config ARM bool "ARM architecture" diff --git a/arch/arc/dts/skeleton.dtsi b/arch/arc/dts/skeleton.dtsi index b41d241..3e93d697 100644 --- a/arch/arc/dts/skeleton.dtsi +++ b/arch/arc/dts/skeleton.dtsi @@ -10,4 +10,10 @@ chosen { }; aliases { }; memory { device_type = "memory"; reg = <0 0>; };
- timer@0 {
compatible = "snps,arc-timer";
clock-frequency = <100000000>;
reg = <0>;
- };
I've just realized that with timer clock hard-coded for now we need to duplicate timer entry for each and every ARC board because they all are clocked by differently.
For example axs101 runs @700 MHz and so its timer increment with the same speed but axs103 runs @100 MHz and its timer runs at the same 100 MHz speed.
I think with your next change http://patchwork.ozlabs.org/patch/696870/ we'll be able to move timer node in common skeleton i instead of hardcoded clock value we'll refer to clk phandle and clk phandle will be specified per board.
I.e. this series should be respinned again I thin, sorry for catching that issue a bit too late.
-Alexey