Re: [U-Boot] [PATCH] arm: zynq: Add initial support for Avnet MiniZed

On 4.5.2018 11:40, Ibai Erkiaga wrote:

Initial support for Avnet MiniZed board. Tested UART1 (serial console), QSPI(Flash), SDHCI1 (eMMC), USB.

Signed-off-by: Ibai Erkiaga ibai.erkiaga-elorza@xilinx.com

arch/arm/dts/Makefile | 1 + arch/arm/dts/zynq-minized.dts | 115 ++++++++++++++++++++++++++++++++++++++++ configs/zynq_minized_defconfig | 68 +++++++++++++++++++++++ 3 files changed, 184 insertions(+), 0 deletions(-) create mode 100644 arch/arm/dts/zynq-minized.dts create mode 100644 configs/zynq_minized_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index ac7667b..ba1e261 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -131,6 +131,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \ zynq-cc108.dtb \ zynq-cse-qspi-single.dtb \ zynq-microzed.dtb \

• zynq-minized.dtb \ zynq-picozed.dtb \ zynq-syzygy-hub.dtb \ zynq-topic-miami.dtb \

diff --git a/arch/arm/dts/zynq-minized.dts b/arch/arm/dts/zynq-minized.dts new file mode 100644 index 0000000..ecf1bc0 --- /dev/null +++ b/arch/arm/dts/zynq-minized.dts @@ -0,0 +1,115 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*

• • dts file for Avnet MiniZed board
• • (C) Copyright 2017 - 2018, Xilinx, Inc.
• • Ibai Erkiaga ibai.erkiaga-elorza@xilinx.com
• */

+/dts-v1/; +#include "zynq-7000.dtsi"

+/ {

• model = "Zynq MiniZed Development Board";
• compatible = "xlnx,zynq-zed", "xlnx,zynq-7000";

My patch for adding avnet prefix to kernel was accepted. That's why use: model = "Avnet Zynq MiniZed Development Board"; compatible = "avnet,minized", "xlnx,zynq-7000";

• aliases {

• serial0 = &uart1;
  

• serial1 = &uart0;
  

• spi0 = &qspi;
  

• mmc0 = &sdhci0;
  

• };
• memory@0 {

• device_type = "memory";
  

• reg = <0x0 0x20000000>;
  

• };
• chosen {

• bootargs = "";
  

• stdout-path = "serial0:115200n8";
  

• };
• usb_phy0: phy0@e0002000 {

• compatible = "ulpi-phy";
  

• #phy-cells = <0>;
  

• reg = <0xe0002000 0x1000>;
  

• view-port = <0x0170>;
  

• drv-vbus;
  

• };

Please check other boards. This ulpi-phy is just in Xilinx git repo.

+};

+&gpio0 {

• emio-gpio-width = <4>;
• gpio-mask-high = <0x0>;
• gpio-mask-low = <0x5600>;

This is not the part of binding.

+};

+&intc {

• num_cpus = <2>;
• num_interrupts = <96>;

this is not the part of kernel intc binding doc. It looks like qemu binding.

+};

+&qspi {

• status = "okay";
• is-dual = <0>;
• num-cs = <1>;
• flash@0 {

• compatible = "micron,m25p128";
  

• reg = <0x0>;
  

• spi-tx-bus-width = <4>;
  

• spi-rx-bus-width = <4>;
  

• spi-max-frequency = <50000000>;
  

please use "fixed-partitions" here.

• partition@0x00000000 {
  

remove 0x from node name and the same below.

• 	label = "boot";
  

• 	reg = <0x0 0xff0000>;
  

• };
  

• partition@0x00270000 {
  

• 	label = "kernel";
  

• 	reg = <0x270000 0xd80000>;
  

• };
  

• partition@0x00ff0000 {
  

• 	label = "bootenv";
  

• 	reg = <0xff0000 0x10000>;
  

• };
  

• partition@0x01000000 {
  

• 	label = "spare";
  

• 	reg = <0x1000000 0x0>;
  

• };
  

• };

+};

+&uart0 {

• status = "okay";

+};

+&uart1 {

• u-boot,dm-pre-reloc;
• status = "okay";

+};

+&usb0 {

• status = "okay";
• dr_mode = "host";
• usb-phy = <&usb_phy0>;
• usb-reset = <&gpio0 7 0>; /* USB_RST_N-MIO7 */

+};

+&sdhci1 {

• status = "okay";
• non-removable;
• bus-width= <4>;

missing space.

• #address-cells = <1>;
• #size-cells = <0>;
• mmccard: mmccard@0 {

• compatible = "mmc-card";
  

• reg = <0>;
  

• broken-hpi;
  

• };

+}; diff --git a/configs/zynq_minized_defconfig b/configs/zynq_minized_defconfig new file mode 100644 index 0000000..05cfc0e --- /dev/null +++ b/configs/zynq_minized_defconfig @@ -0,0 +1,68 @@ +CONFIG_ARM=y +CONFIG_ARCH_ZYNQ=y +CONFIG_SYS_TEXT_BASE=0x4000000 +CONFIG_SPL=y +CONFIG_SPL_STACK_R_ADDR=0x200000 +CONFIG_DEFAULT_DEVICE_TREE="zynq-minized" +CONFIG_DEBUG_UART=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_STACK_R=y +CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_PROMPT="Zynq> " +CONFIG_CMD_THOR_DOWNLOAD=y +CONFIG_CMD_DFU=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_FPGA_LOADBP=y +CONFIG_CMD_FPGA_LOADFS=y +CONFIG_CMD_FPGA_LOADMK=y +CONFIG_CMD_FPGA_LOADP=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_OF_EMBED=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_DFU_MMC=y +CONFIG_DFU_RAM=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQPL=y +CONFIG_DM_GPIO=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ZYNQ=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_MARVELL=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_XILINX=y +CONFIG_ZYNQ_GEM=y +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_DEBUG_UART_BASE=0xe0001000 +CONFIG_DEBUG_UART_CLOCK=50000000 +CONFIG_ZYNQ_SERIAL=y +CONFIG_ZYNQ_QSPI=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03fd +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 +CONFIG_CI_UDC=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_THOR=y

Thanks, Michal