
5 Apr
2021
5 Apr
'21
9:43 a.m.
On 02/04/21 06:28PM, Sean Anderson wrote:
On 4/1/21 3:31 PM, Pratyush Yadav wrote:
Hi,
This series adds support for octal DTR flashes in the SPI NOR framework,
As an overall question, is this the same as "DDR" mode?
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DDR is "Double Data Rate" which implies that the "double" part only refers to the data phase. DTR is "Double Transfer Rate" which means the "double" part refers to all 3 (command, address, data) phases.
The underlying concept is the same: transfer data twice per clock cycle.
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Regards,
Pratyush Yadav
Texas Instruments Inc.