Use generic is_cortex_a() functions instead of open-coded midr_el1 read. No functional change.
Reviewed-by: Paul Barker paul.barker.ct@bp.renesas.com Signed-off-by: Marek Vasut marek.vasut+renesas@mailbox.org --- Cc: Biju Das biju.das.jz@bp.renesas.com Cc: Chris Paterson chris.paterson2@renesas.com Cc: Lad Prabhakar prabhakar.mahadev-lad.rj@bp.renesas.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org Cc: Paul Barker paul.barker.ct@bp.renesas.com Cc: Tom Rini trini@konsulko.com Cc: u-boot@lists.denx.de --- V2: - Rebase on u-boot/next - Add RB from Paul --- board/hoperun/hihope-rzg2/hihope-rzg2.c | 8 ++------ board/renesas/rcar-common/gen3-common.c | 10 +++------- 2 files changed, 5 insertions(+), 13 deletions(-)
diff --git a/board/hoperun/hihope-rzg2/hihope-rzg2.c b/board/hoperun/hihope-rzg2/hihope-rzg2.c index 8b635ef71ac..d2c5aaacf66 100644 --- a/board/hoperun/hihope-rzg2/hihope-rzg2.c +++ b/board/hoperun/hihope-rzg2/hihope-rzg2.c @@ -6,6 +6,7 @@ * Copyright (C) 2021 Renesas Electronics Corporation */
+#include <asm/armv8/cpu.h> #include <asm/global_data.h> #include <asm/io.h> #include <asm/processor.h> @@ -66,12 +67,7 @@ int board_init(void)
void reset_cpu(void) { - unsigned long midr, cputype; - - asm volatile("mrs %0, midr_el1" : "=r" (midr)); - cputype = (midr >> 4) & 0xfff; - - if (cputype == 0xd03) + if (is_cortex_a53()) writel(RST_CA53_CODE, RST_CA53RESCNT); else writel(RST_CA57_CODE, RST_CA57RESCNT); diff --git a/board/renesas/rcar-common/gen3-common.c b/board/renesas/rcar-common/gen3-common.c index 4291e1d5bcb..004feca6180 100644 --- a/board/renesas/rcar-common/gen3-common.c +++ b/board/renesas/rcar-common/gen3-common.c @@ -7,6 +7,7 @@ * Copyright (C) 2015 Nobuhiro Iwamatsu iwamatsu@nigauri.org */
+#include <asm/armv8/cpu.h> #include <dm.h> #include <fdt_support.h> #include <hang.h> @@ -50,14 +51,9 @@ int fdtdec_board_setup(const void *fdt_blob)
void __weak reset_cpu(void) { - unsigned long midr, cputype; - - asm volatile("mrs %0, midr_el1" : "=r" (midr)); - cputype = (midr >> 4) & 0xfff; - - if (cputype == 0xd03) + if (is_cortex_a53()) writel(RST_CA53_CODE, RST_CA53RESCNT); - else if (cputype == 0xd07) + else if (is_cortex_a57()) writel(RST_CA57_CODE, RST_CA57RESCNT); else hang();