
11 Nov
2016
11 Nov
'16
2:41 p.m.
From: Naga Sureshkumar Relli naga.sureshkumar.relli@xilinx.com
This patch adds edac node for arm cortexa53 to report errors on L1 and L2 caches.
Signed-off-by: Naga Sureshkumar Relli nagasure@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index c2f8fc7b70d9..22526268bb4f 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -229,6 +229,10 @@ <1 10 0xf01>; };
+ edac { + compatible = "arm,cortex-a53-edac"; + }; + amba_apu: amba_apu@0 { compatible = "simple-bus"; #address-cells = <2>;
--
1.9.1