diff -Naur u-boot-2006-05-10-1800/include/configs/ml401.h u-boot-2006-05-10-1800-microblaze/include/configs/ml401.h
--- u-boot-2006-05-10-1800/include/configs/ml401.h	1970-01-01 01:00:00.000000000 +0100
+++ u-boot-2006-05-10-1800-microblaze/include/configs/ml401.h	2006-06-15 19:38:24.000000000 +0200
@@ -0,0 +1,210 @@
+/*
+ * (C) Copyright 2006 Czech Technical University.
+ *
+ * Michal SIMEK <www.monstr.eu>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* xparameters.h wrapper */
+#include "../board/xilinx/ml401/xparameters.h"
+
+#define CONFIG_MICROBLAZE	1	/* MicroBlaze CPU */
+#define CONFIG_ML401		1	/* ML401 Board */
+
+/* uart */
+#define CONFIG_SERIAL_BASE	CONFIG_XILINX_UARTLITE_0_BASEADDR  /* address uart */
+#define CONFIG_BAUDRATE	CONFIG_XILINX_UARTLITE_0_BAUDRATE  /* baudrate uart */
+#define CFG_BAUDRATE_TABLE	{ CONFIG_BAUDRATE }
+
+/* ddr sdram - main memory */
+#define CFG_SDRAM_BASE		CONFIG_XILINX_ERAM_START /* base addr ddr */
+#define CFG_SDRAM_SIZE		CONFIG_XILINX_ERAM_SIZE  /* redefine size - EDK optimalization */
+
+/* global pointer */
+#define CFG_GBL_DATA_SIZE	0x1000	/* 4kilobyte od konce pameti pro */
+#define CFG_GBL_DATA_OFFSET    (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET	/* stack pointer */
+
+/* setting reset address */
+#define CFG_RESET_ADDRESS	TEXT_BASE
+
+#define CONFIG_COMMANDS	(CONFIG__CMD_DFL |\
+				 CFG_CMD_MEMORY|\
+				 CFG_CMD_MISC|\
+				 CFG_CMD_AUTOSCRIPT|\
+				 CFG_CMD_IRQ|\
+				 CFG_CMD_FLASH |\
+				 CFG_CMD_ASKENV |\
+				 CFG_CMD_BDI|\
+				 CFG_CMD_RUN|\
+				 CFG_CMD_IMLS |\
+				 CFG_CMD_LOADS |\
+				 CFG_CMD_LOADB |\
+				 CFG_CMD_SAVES |\
+				 CFG_CMD_IMI |\
+	    			 CFG_CMD_ENV |\
+				 CFG_CMD_NET |\
+				 CFG_CMD_CACHE |\
+				 CFG_CMD_PING \
+				 )

+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+#define CFG_MEMTEST_START	0x00002000
+#define CFG_MEMTEST_END	0x00010000
+
+/* flash */
+#define CFG_FLASH_CFI
+#define CFG_FLASH_CFI_DRIVER
+#define CFG_FLASH_EMPTY_INFO
+#define CFG_HZ			500
+#define CFG_FLASH_BASE		CONFIG_XILINX_FLASH_START 	/* base address */
+#define CFG_FLASH_SIZE		CONFIG_XILINX_FLASH_SIZE	/* size of flash memory */
+#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks */
+#define CFG_MAX_FLASH_SECT	128	/* max number of sectors on one chip */
+
+#define CFG_ENV_IS_IN_FLASH
+#define CFG_ENV_SECT_SIZE	0x40000	/* see README - env sector total size */
+#define CFG_ENV_SIZE		0x2000-4   /* Total Size of Environment Sector */
+#define CFG_ENV_ADDR		0x28040000
+
+#define CFG_LOAD_ADDR		0x28080000 /* default load address	*/
+#define CONFIG_BOOTDELAY 	10
+#define CONFIG_BOOTARGS	"root=romfs"
+#define CONFIG_HOSTNAME 	"ml401"
+#define CONFIG_IPADDR 		192.168.0.3
+#define CONFIG_SERVERIP 	192.168.0.2
+#define CONFIG_GATEWAYIP 	192.168.0.1
+#define CONFIG_BOOTCOMMAND 	"bootm"
+#define CONFIG_ETHADDR		00:E0:0C:00:01:F4
+
+/* Miscellaneous configurable options */
+#define CFG_PROMPT		"ml401-mONStR> "/* Monitor Command Prompt */
+#define CFG_CBSIZE		512  /* size of console buffer */
+#define CFG_PBSIZE 		(CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) /* Print Buffer Size */
+#define CFG_MAXARGS		15	    /* max number of command args */
+
+#define CFG_GPIO_0
+#define CFG_GPIO_0_ADDR	CONFIG_XILINX_GPIO_0_BASEADDR
+
+#define CFG_INTC_0		/* enable timer */
+#define CFG_INTC_0_ADDR	CONFIG_XILINX_INTC_0_BASEADDR
+#define CFG_INTC_0_NUM		CONFIG_XILINX_INTC_0_NUM_INTR_INPUTS
+
+#define CFG_TIMER_0		/* enable timer */
+#define CFG_TIMER_0_ADDR	CONFIG_XILINX_TIMER_0_BASEADDR
+#define CFG_TIMER_0_IRQ	CONFIG_XILINX_TIMER_0_IRQ
+#define FREQUENCE		66666666
+#define CFG_TIMER_0_PRELOAD	( FREQUENCE/1000 )
+
+#undef CFG_HUSH_PARSER
+#define CFG_LONGHELP
+#undef CONFIG_AUTO_COMPLETE
+
+#undef CFG_CONSOLE_IS_IN_ENV
+#undef CONFIG_SILENT_CONSOLE
+#undef CONFIG_MODEM_SUPPORT_DEBUG
+#undef CONFIG_SPLASH_SCREEN
+
+#undef CONFIG_MX_CYCLIC
+#undef CONFIG_LOOPW
+#undef CFG_ALT_MEMTEST
+
+#undef CFG_LOADS_BAUD_CHANGE
+
+#define CPU_CLK_FREQ		CONFIG_SYS_FREQ
+
+#endif	/* __CONFIG_H */

