On Tue, 19 Dec 2017, Kever Yang wrote:
Move original spl to tpl, and add spl to load next stage firmware, adapt all the address and option for them.
Serial-changes: 2
- update upon latest source
Signed-off-by: Kever Yang kever.yang@rock-chips.com
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
See below for requested changes.
Changes in v3:
- do not init ddr region in spl
Changes in v2: None
arch/arm/mach-rockchip/Kconfig | 9 +++ arch/arm/mach-rockchip/Makefile | 3 +- arch/arm/mach-rockchip/rk322x-board-spl.c | 63 +++++-------------- arch/arm/mach-rockchip/rk322x-board-tpl.c | 90 ++++++++++++++++++++++++++++ arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds | 13 ++++ include/configs/rk322x_common.h | 9 ++- 6 files changed, 134 insertions(+), 53 deletions(-) create mode 100644 arch/arm/mach-rockchip/rk322x-board-tpl.c create mode 100644 arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 967290f..dbc197c 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -46,9 +46,18 @@ config ROCKCHIP_RK322X bool "Support Rockchip RK3228/RK3229" select CPU_V7 select SUPPORT_SPL
- select SUPPORT_TPL select SPL
- select TPL
- select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
- select TPL_NEEDS_SEPARATE_STACK if TPL
- select SPL_DRIVERS_MISC_SUPPORT
- imply SPL_SERIAL_SUPPORT
- imply TPL_SERIAL_SUPPORT select ROCKCHIP_BROM_HELPER select DEBUG_UART_BOARD_INIT
- select TPL_LIBCOMMON_SUPPORT
- select TPL_LIBGENERIC_SUPPORT help The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7 including NEON and GPU, Mali-400 graphics, several DDR3 options
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index e1b0519..3c14236 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -13,10 +13,11 @@ obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
obj-tpl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-tpl.o obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o +obj-tpl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-tpl.o
obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o -obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o +obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o spl-boot-order.o obj-spl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o diff --git a/arch/arm/mach-rockchip/rk322x-board-spl.c b/arch/arm/mach-rockchip/rk322x-board-spl.c index 35f4f97..89af1d9 100644 --- a/arch/arm/mach-rockchip/rk322x-board-spl.c +++ b/arch/arm/mach-rockchip/rk322x-board-spl.c @@ -5,77 +5,46 @@ */
#include <common.h> -#include <debug_uart.h> #include <dm.h> -#include <ram.h> #include <spl.h> -#include <asm/io.h> -#include <asm/arch/bootrom.h> -#include <asm/arch/cru_rk322x.h> -#include <asm/arch/grf_rk322x.h> -#include <asm/arch/hardware.h> -#include <asm/arch/timer.h> -#include <asm/arch/uart.h>
+DECLARE_GLOBAL_DATA_PTR;
u32 spl_boot_device(void) { return BOOT_DEVICE_MMC1; } -DECLARE_GLOBAL_DATA_PTR;
-#define GRF_BASE 0x11000000 -#define SGRF_BASE 0x10140000
-#define DEBUG_UART_BASE 0x11030000 +u32 spl_boot_mode(const u32 boot_device) +{
- return MMCSD_MODE_RAW;
+}
void board_debug_uart_init(void) { -static struct rk322x_grf * const grf = (void *)GRF_BASE;
- /* Enable early UART2 channel 1 on the RK322x */
- rk_clrsetreg(&grf->gpio1b_iomux,
GPIO1B1_MASK | GPIO1B2_MASK,GPIO1B2_UART21_SIN << GPIO1B2_SHIFT |GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT);- /* Set channel C as UART2 input */
- rk_clrsetreg(&grf->con_iomux,
CON_IOMUX_UART2SEL_MASK,CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);}
-#define SGRF_DDR_CON0 0x10150000 void board_init_f(ulong dummy) {
struct udevice *dev; int ret;
/*
* Debug UART can be used from here if required:** debug_uart_init();* printch('a');* printhex8(0x1234);* printascii("string");*/debug_uart_init();
printascii("SPL Init");
ret = spl_early_init(); if (ret) {
debug("spl_early_init() failed: %d\n", ret);
printf("spl_early_init() failed: %d\n", ret);- preloader_console_init();
+}
- rockchip_timer_init();
- printf("timer init done\n");
- ret = uclass_get_device(UCLASS_RAM, 0, &dev);
- if (ret) {
printf("DRAM init failed: %d\n", ret);return;- }
+#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{
- /* Just empty function now - can't decide what to choose */
- debug("%s: %s\n", __func__, name);
- /* Disable the ddr secure region setting to make it non-secure */
- rk_clrreg(SGRF_DDR_CON0, 0x4000);
#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT) back_to_bootrom(BROM_BOOT_NEXTSTAGE); #endif
- return 0;
} +#endif diff --git a/arch/arm/mach-rockchip/rk322x-board-tpl.c b/arch/arm/mach-rockchip/rk322x-board-tpl.c new file mode 100644 index 0000000..aa14cef --- /dev/null +++ b/arch/arm/mach-rockchip/rk322x-board-tpl.c @@ -0,0 +1,90 @@ +/*
- (C) Copyright 2017 Rockchip Electronics Co., Ltd
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <debug_uart.h> +#include <dm.h> +#include <ram.h> +#include <spl.h> +#include <asm/io.h> +#include <asm/arch/bootrom.h> +#include <asm/arch/cru_rk322x.h> +#include <asm/arch/grf_rk322x.h> +#include <asm/arch/hardware.h> +#include <asm/arch/timer.h> +#include <asm/arch/uart.h>
+u32 spl_boot_device(void) +{
- return BOOT_DEVICE_MMC1;
+} +DECLARE_GLOBAL_DATA_PTR;
+#define GRF_BASE 0x11000000 +#define SGRF_BASE 0x10140000 +#define DEBUG_UART_BASE 0x11030000 +#define SECURE_TIMER_BASE 0x110d0020 +#define SGRF_DDR_CON0 0x10150000
Most of these defines are not used in the code below. Please remove.
+void board_debug_uart_init(void) +{
- static struct rk322x_grf * const grf = (void *)GRF_BASE;
- /* Enable early UART2 channel 1 on the RK322x */
- rk_clrsetreg(&grf->gpio1b_iomux,
GPIO1B1_MASK | GPIO1B2_MASK,GPIO1B2_UART21_SIN << GPIO1B2_SHIFT |GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT);- /* Set channel C as UART2 input */
- rk_clrsetreg(&grf->con_iomux,
CON_IOMUX_UART2SEL_MASK,CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);+}
+void secure_timer_init(void) +{
- writel(0, SECURE_TIMER_BASE + 0x10);
- writel(0xffffffff, SECURE_TIMER_BASE);
- writel(0xffffffff, SECURE_TIMER_BASE + 4);
- writel(1, SECURE_TIMER_BASE + 0x10);
+}
If possible please use the DM timer class and the rockchip_timer.c driver as a timebase for U-Boot (I assume that the secure timer will be set up by OP-TEE anyway)... this should render this initialisation unnecessary.
+void board_init_f(ulong dummy) +{
- struct udevice *dev;
- int ret;
- /*
* Debug UART can be used from here if required:** debug_uart_init();* printch('a');* printhex8(0x1234);* printascii("string");*/- debug_uart_init();
- printascii("TPL Init");
- ret = spl_early_init();
- if (ret) {
debug("spl_early_init() failed: %d\n", ret);hang();- }
- secure_timer_init();
- rockchip_timer_init();
Again: by using the DM timer drivers, you won't need to call the rockchip_timer_init (as the init will be done by the DM timer).
- printf("timer init done\n");
- ret = uclass_get_device(UCLASS_RAM, 0, &dev);
- if (ret) {
printf("DRAM init failed: %d\n", ret);return;- }
- /* Disable the ddr secure region setting to make it non-secure */
- rk_clrreg(SGRF_DDR_CON0, 0x4000);
Please use syscon to get the SGRF base-address and access this through the SGRF structure definition.
+#if defined(CONFIG_TPL_ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_TPL_BOARD_INIT)
- back_to_bootrom(BROM_BOOT_NEXTSTAGE);
+#endif +} diff --git a/arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds b/arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds new file mode 100644 index 0000000..841c803 --- /dev/null +++ b/arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds @@ -0,0 +1,13 @@ +/*
- Copyright (C) 2017 Rockchip Electronic Co.,Ltd
- SPDX-License-Identifier: GPL-2.0+
- */
+#undef CONFIG_SPL_TEXT_BASE +#define CONFIG_SPL_TEXT_BASE CONFIG_TPL_TEXT_BASE
+#undef CONFIG_SPL_MAX_SIZE +#define CONFIG_SPL_MAX_SIZE CONFIG_TPL_MAX_SIZE
+#include "../../cpu/u-boot-spl.lds" diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index b22169d..5536b58 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -20,11 +20,10 @@
#define CONFIG_SPL_FRAMEWORK #define CONFIG_SYS_NS16550_MEM32 -#define CONFIG_SYS_TEXT_BASE 0x60000000 -#define CONFIG_SYS_INIT_SP_ADDR 0x60100000 -#define CONFIG_SYS_LOAD_ADDR 0x60800800 -#define CONFIG_SPL_STACK 0x10088000 -#define CONFIG_SPL_TEXT_BASE 0x10081004 +#define CONFIG_SYS_TEXT_BASE 0x61000000 +#define CONFIG_SYS_INIT_SP_ADDR 0x61100000 +#define CONFIG_SYS_LOAD_ADDR 0x61800800 +#define CONFIG_SPL_TEXT_BASE 0x60000000
#define CONFIG_ROCKCHIP_MAX_INIT_SIZE (28 << 10) #define CONFIG_ROCKCHIP_CHIP_TAG "RK32"