Show what the output clock rate actually is.
Signed-off-by: Phil Edworthy phil.edworthy@renesas.com --- drivers/spi/cadence_qspi_apb.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index b9e0df7..3ae4b5a 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -281,13 +281,13 @@ void cadence_qspi_apb_config_baudrate_div(void *reg_base, div = DIV_ROUND_UP(ref_clk_hz, sclk_hz); div = DIV_ROUND_UP(div, 2) - 1;
- debug("%s: ref_clk %dHz sclk %dHz Div 0x%x\n", __func__, - ref_clk_hz, sclk_hz, div); - /* ensure the baud rate doesn't exceed the max value */ if (div > CQSPI_REG_CONFIG_BAUD_MASK) div = CQSPI_REG_CONFIG_BAUD_MASK;
+ debug("%s: ref_clk %dHz sclk %dHz Div 0x%x, actual %dHz\n", __func__, + ref_clk_hz, sclk_hz, div, ref_clk_hz / (2 * (div + 1))); + reg |= (div << CQSPI_REG_CONFIG_BAUD_LSB); writel(reg, reg_base + CQSPI_REG_CONFIG);