On Tue, Apr 12, 2022 at 02:32:16PM -0500, Dave Gerlach wrote:
Hi,
On 4/11/22 07:32, Tom Rini wrote:
On Fri, Apr 08, 2022 at 04:46:50PM -0500, Dave Gerlach wrote:
Allow device tree to provide ti,ddr-freq0 to be used as the initial DDR frequency that is set for lpddr4 before initialization of the controller. Make this optional and continue to use PLL bypass frequency as is done currently if ti,ddr-freq0 is not provided.
Signed-off-by: Dave Gerlach d-gerlach@ti.com
.../memory-controller/k3-j721e-ddrss.txt | 2 ++ drivers/ram/k3-ddrss/k3-ddrss.c | 15 ++++++++++----- 2 files changed, 12 insertions(+), 5 deletions(-)
What's the status of getting this binding upstreamed? I forget if this is one I've asked about before or not. Thanks.
I am pretty sure nobody is looking at this one, but I'd be happy to take it up.
Great, thanks!