20 Oct
2012
20 Oct
'12
1:58 a.m.
Hi, On Sat, 6 Oct 2012 22:16:04 +0800 Liu Ying Ying.liu@freescale.com wrote:
From: Liu Ying Ying.Liu@freescale.com
This patch checks self-clear sw_ipu_rst bit in SCR register of SRC controller to be cleared after setting it to high to reset IPUv3. This makes sure that IPUv3 finishes sofware reset. A timeout mechanism is added to stop polling on the bit status in case the bit could not be cleared by the hardware automatically within 10 millisecond.
Signed-off-by: Liu Ying Ying.Liu@freescale.com
drivers/video/ipu_common.c | 10 ++++++++++ 1 files changed, 10 insertions(+), 0 deletions(-)
applied, thanks!
Anatolij