On Mon, 2007-06-18 at 13:39 +0200, Nils Gjerdevik wrote:
Hi, I'm trying to store the u-boot environment in an EEPROM (at24c128) on a custom at91rm9200 based board. This fails when using the included HARD_I2C driver, and since there are known problems with the I2C controller on this uC, I'm trying to set up SOFT_I2C instead, without success so far... This is what I've put in my config file:
#define I2C_INIT \ do { \ *AT91C_PIOA_PER = AT91C_PA25_TWD | AT91C_PA26_TWCK; \ *AT91C_PIOA_ODR = AT91C_PA25_TWD; \ *AT91C_PIOA_OER = AT91C_PA26_TWCK; \ }while(0)
#define I2C_ACTIVE (*AT91C_PIOA_OER = AT91C_PA25_TWD)
#define I2C_TRISTATE (*AT91C_PIOA_ODR = AT91C_PA25_TWD)
#define I2C_READ ((*AT91C_PIOA_PDSR & AT91C_PA25_TWD) != 0)
#define I2C_SDA(bit) \ if(bit) { \ *AT91C_PIOA_SODR = AT91C_PA25_TWD; \ } else { \ *AT91C_PIOA_CODR = AT91C_PA25_TWD; \ }
#define I2C_SCL(bit) \ if(bit) { \ *AT91C_PIOA_SODR = AT91C_PA26_TWCK; \ } else { \ *AT91C_PIOA_CODR = AT91C_PA26_TWCK; \ }
#define I2C_DELAY udelay(5)
Can anyone see what's wrong with this code? I can access the EEPROM without problems in Linux, using the bit-banging driver, so the board design should be OK. The code above is(loosely) based on the Linux bit-banging driver.
Regards, Nils
Hi Nils Don't know anything about at91rm9200, but you could test the below patch I sent a few weeks ago. I have tested it now and it works for me.
--- I think the README w.r.t I2C_TRISTATE is OK as is(don't change it). I do think the soft i2c driver is broken in several places w.r.t IC2_ACTIVE/I2C_TRISTATE and I2C reset sequence. The below patch is an attempt to fix it, but I havn't tested it.
Signed-off-by: Joakim Tjernlund joakim.tjernlund@transmode.se
diff --git a/common/soft_i2c.c b/common/soft_i2c.c index edad51b..ed3f8f8 100644 --- a/common/soft_i2c.c +++ b/common/soft_i2c.c @@ -100,15 +100,18 @@ static void send_reset(void) #endif I2C_TRISTATE; for(j = 0; j < 9; j++) { + if(I2C_READ) + send_start(); I2C_SCL(0); I2C_DELAY; + I2C_TRISTATE; + I2C_SDA(1); I2C_DELAY; I2C_SCL(1); I2C_DELAY; I2C_DELAY; } send_stop(); - I2C_TRISTATE; }
/*----------------------------------------------------------------------- @@ -124,12 +127,13 @@ static void send_start(void) #endif
I2C_DELAY; + I2C_TRISTATE; I2C_SDA(1); - I2C_ACTIVE; I2C_DELAY; I2C_SCL(1); I2C_DELAY; I2C_SDA(0); + I2C_ACTIVE; I2C_DELAY; }
@@ -152,9 +156,9 @@ static void send_stop(void) I2C_DELAY; I2C_SCL(1); I2C_DELAY; + I2C_TRISTATE; I2C_SDA(1); I2C_DELAY; - I2C_TRISTATE; }
@@ -172,14 +176,17 @@ static void send_ack(int ack)
I2C_SCL(0); I2C_DELAY; - I2C_ACTIVE; I2C_SDA(ack); + I2C_ACTIVE; I2C_DELAY; I2C_SCL(1); I2C_DELAY; I2C_DELAY; I2C_SCL(0); I2C_DELAY; + I2C_TRISTATE; + I2C_SDA(1); + I2C_DELAY; }
@@ -215,8 +222,8 @@ static int write_byte(uchar data) */ I2C_SCL(0); I2C_DELAY; - I2C_SDA(1); I2C_TRISTATE; + I2C_SDA(1); I2C_DELAY; I2C_SCL(1); I2C_DELAY; @@ -224,7 +231,6 @@ static int write_byte(uchar data) nack = I2C_READ; I2C_SCL(0); I2C_DELAY; - I2C_ACTIVE;
return(nack); /* not a nack is an ack */ } @@ -249,6 +255,7 @@ static uchar read_byte(int ack) * Read 8 bits, MSB first. */ I2C_TRISTATE; + I2C_SDA(1); data = 0; for(j = 0; j < 8; j++) { I2C_SCL(0);