Shinya Kuribayashi wrote:
Vlad Lungu wrote:
in include/asm-mips/addrspace.h line 52, there is a
#define UNCACHED_SDRAM(a) PHYSADDR(a)
The question is: shouldn't we use KSEG1ADDR() instead of PHYSADDR()?
I think we should. At least my target boards need that change.
http://www.nabble.com/MIPS-cache-management-%28and-build%29-questions.-tf443...
And what board would that be? Or it's not in the tree?
note: Wrt dcache_disable() part, please take into account Stefan's comment.
Anyway I seriously wonder whether other mips ports work as it is.
<comment mode="AOL"> me too </comment>
The RAM might be mapped at 0 too on some boards, that's why it works with PHYSADDR(). Or people are simply bootelf-ing Linux, that's why the bug was not catched before (I think the only use of that macro is in lib_mips/mips_linux.c i.e. bootm). Note that the Au1x00 boards ( and another one, can't remember the name) do 0x20000000|a or something like that, which when you go from KSEG0 (0x8???????) produces 0xa???????, an address in KSEG1.
Wolfgang, should I submit a patch on this for 1.3.0?
Vlad