The pch_gbe driver has 4 paths which open-code the equivalent of wait_for_bit(). Replace these with use of wait_for_bit() in order to shorten the code & avoid duplication.
Signed-off-by: Paul Burton paul.burton@mips.com Cc: Daniel Schwierzeck daniel.schwierzeck@gmail.com Cc: Joe Hershberger joe.hershberger@ni.com Cc: u-boot@lists.denx.de ---
drivers/net/pch_gbe.c | 67 ++++++++++++++------------------------------------- 1 file changed, 18 insertions(+), 49 deletions(-)
diff --git a/drivers/net/pch_gbe.c b/drivers/net/pch_gbe.c index 351debbd9b..052650c036 100644 --- a/drivers/net/pch_gbe.c +++ b/drivers/net/pch_gbe.c @@ -13,6 +13,7 @@ #include <pci.h> #include <miiphy.h> #include <asm/gpio.h> +#include <wait_bit.h> #include "pch_gbe.h"
#if !defined(CONFIG_PHYLIB) @@ -43,7 +44,6 @@ static void pch_gbe_mac_read(struct pch_gbe_regs *mac_regs, u8 *addr) static int pch_gbe_mac_write(struct pch_gbe_regs *mac_regs, u8 *addr) { u32 macid_hi, macid_lo; - ulong start;
macid_hi = addr[0] + (addr[1] << 8) + (addr[2] << 16) + (addr[3] << 24); macid_lo = addr[4] + (addr[5] << 8); @@ -52,15 +52,8 @@ static int pch_gbe_mac_write(struct pch_gbe_regs *mac_regs, u8 *addr) writel(macid_lo, &mac_regs->mac_adr[0].low); writel(0xfffe, &mac_regs->addr_mask);
- start = get_timer(0); - while (get_timer(start) < PCH_GBE_TIMEOUT) { - if (!(readl(&mac_regs->addr_mask) & PCH_GBE_BUSY)) - return 0; - - udelay(10); - } - - return -ETIME; + return wait_for_bit(__func__, &mac_regs->addr_mask, PCH_GBE_BUSY, + false, PCH_GBE_TIMEOUT, false); }
static int pch_gbe_reset(struct udevice *dev) @@ -68,7 +61,7 @@ static int pch_gbe_reset(struct udevice *dev) struct pch_gbe_priv *priv = dev_get_priv(dev); struct eth_pdata *plat = dev_get_platdata(dev); struct pch_gbe_regs *mac_regs = priv->mac_regs; - ulong start; + int err;
priv->rx_idx = 0; priv->tx_idx = 0; @@ -99,22 +92,17 @@ static int pch_gbe_reset(struct udevice *dev) writel(PCH_GBE_RGMII_MODE_RGMII | PCH_GBE_CHIP_TYPE_INTERNAL, &mac_regs->rgmii_ctrl);
- start = get_timer(0); - while (get_timer(start) < PCH_GBE_TIMEOUT) { - if (!(readl(&mac_regs->reset) & PCH_GBE_ALL_RST)) { - /* - * Soft reset clears hardware MAC address registers, - * so we have to reload MAC address here in order to - * make linux pch_gbe driver happy. - */ - return pch_gbe_mac_write(mac_regs, plat->enetaddr); - } - - udelay(10); - } + err = wait_for_bit(__func__, &mac_regs->reset, PCH_GBE_ALL_RST, + false, PCH_GBE_TIMEOUT, false); + if (err) + return err;
- debug("pch_gbe: reset timeout\n"); - return -ETIME; + /* + * Soft reset clears hardware MAC address registers, + * so we have to reload MAC address here in order to + * make linux pch_gbe driver happy. + */ + return pch_gbe_mac_write(mac_regs, plat->enetaddr); }
static void pch_gbe_rx_descs_init(struct udevice *dev) @@ -255,8 +243,6 @@ static int pch_gbe_send(struct udevice *dev, void *packet, int length) struct pch_gbe_regs *mac_regs = priv->mac_regs; struct pch_gbe_tx_desc *tx_head, *tx_desc; u16 frame_ctrl = 0; - u32 int_st; - ulong start;
flush_dcache_range((ulong)packet, (ulong)packet + length);
@@ -282,17 +268,8 @@ static int pch_gbe_send(struct udevice *dev, void *packet, int length) writel(dm_pci_virt_to_mem(priv->dev, tx_head + priv->tx_idx), &mac_regs->tx_dsc_sw_p);
- start = get_timer(0); - while (get_timer(start) < PCH_GBE_TIMEOUT) { - int_st = readl(&mac_regs->int_st); - if (int_st & PCH_GBE_INT_TX_CMPLT) - return 0; - - udelay(10); - } - - debug("pch_gbe: sent failed\n"); - return -ETIME; + return wait_for_bit(__func__, &mac_regs->int_st, PCH_GBE_INT_TX_CMPLT, + true, PCH_GBE_TIMEOUT, false); }
static int pch_gbe_recv(struct udevice *dev, int flags, uchar **packetp) @@ -345,16 +322,8 @@ static int pch_gbe_free_pkt(struct udevice *dev, uchar *packet, int length)
static int pch_gbe_mdio_ready(struct pch_gbe_regs *mac_regs) { - ulong start = get_timer(0); - - while (get_timer(start) < PCH_GBE_TIMEOUT) { - if (readl(&mac_regs->miim) & PCH_GBE_MIIM_OPER_READY) - return 0; - - udelay(10); - } - - return -ETIME; + return wait_for_bit(__func__, &mac_regs->miim, PCH_GBE_MIIM_OPER_READY, + true, PCH_GBE_TIMEOUT, false); }
static int pch_gbe_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)