To avoid having two microcode formats, adjust the build system to support obtaining the microcode from the device tree, even in the case where it must be made available before the device tree can be accessed.
Also move the microcode for queensbay (unfortunately the wrong version).
Signed-off-by: Simon Glass sjg@chromium.org ---
Makefile | 4 +- arch/x86/cpu/queensbay/M0220661105.inc | 1288 ------------------------------- arch/x86/cpu/queensbay/tnc_car.S | 11 +- arch/x86/dts/crownbay.dts | 7 + arch/x86/dts/microcode/m0120661104.dtsi | 366 +++++++++ 5 files changed, 380 insertions(+), 1296 deletions(-) delete mode 100644 arch/x86/cpu/queensbay/M0220661105.inc create mode 100644 arch/x86/dts/microcode/m0120661104.dtsi
diff --git a/Makefile b/Makefile index 67a7ecb..49c4a89 100644 --- a/Makefile +++ b/Makefile @@ -947,7 +947,9 @@ ifneq ($(CONFIG_X86_RESET_VECTOR),) rom: u-boot.rom FORCE
IFDTOOL=$(objtree)/tools/ifdtool -IFDTOOL_FLAGS = -w $(CONFIG_SYS_TEXT_BASE):$(objtree)/u-boot-dtb.bin +IFDTOOL_FLAGS = -f 0:$(objtree)/u-boot.dtb +IFDTOOL_FLAGS += -m 0x$(shell $(NM) u-boot |grep _dt_ucode_base_size |cut -d' ' -f1) +IFDTOOL_FLAGS += -U $(CONFIG_SYS_TEXT_BASE):$(objtree)/u-boot.bin IFDTOOL_FLAGS += -w $(CONFIG_SYS_X86_START16):$(objtree)/u-boot-x86-16bit.bin
ifneq ($(CONFIG_HAVE_INTEL_ME),) diff --git a/arch/x86/cpu/queensbay/M0220661105.inc b/arch/x86/cpu/queensbay/M0220661105.inc deleted file mode 100644 index f2b2b4e..0000000 --- a/arch/x86/cpu/queensbay/M0220661105.inc +++ /dev/null @@ -1,1288 +0,0 @@ -/* - * Copyright (C) 2013, Intel Corporation - * - * SPDX-License-Identifier: Intel - */ - -/* External Header */ -.long 0x00000001 /* Header Version */ -.long 0x00000105 /* Update Revision */ -.long 0x07182011 /* Date */ -.long 0x00020661 /* Processor Signature */ -.long 0x52558795 /* Checksum */ -.long 0x00000001 /* Loader Revision */ -.long 0x00000002 /* Processor Flags */ -.long 0x000013d0 /* Data Size (excluding headers) */ -.long 0x00001400 /* Total Size (including headers) */ -.long 0x00000000 /* Reserved */ -.long 0x00000000 /* Reserved */ -.long 0x00000000 /* Reserved */ -/* Data */ -.long 0x00000000 -.long 0x000000a1 -.long 0x00020001 -.long 0x00000105 -.long 0x00000019 -.long 0x00050100 -.long 0x20110715 -.long 0x00000401 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temp_ram_init_params: - .long ucode_start /* microcode base */ - .long ucode_size /* microcode size */ +_dt_ucode_base_size: + /* These next two fields are filled in by ifdtool */ + .long 0 /* microcode base */ + .long 0 /* microcode size */ .long CONFIG_SYS_MONITOR_BASE /* code region base */ .long CONFIG_SYS_MONITOR_LEN /* code region size */ - - .balign 4 -ucode_start: - .include "arch/x86/cpu/queensbay/M0220661105.inc" -ucode_size = ( . - ucode_start) diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts index 399dafb..d4df102 100644 --- a/arch/x86/dts/crownbay.dts +++ b/arch/x86/dts/crownbay.dts @@ -50,4 +50,11 @@ memory-map = <0xffe00000 0x00200000>; }; }; + + microcode { + update@0 { +#include "microcode/m12206a7_00000029.dtsi" + }; + }; + }; diff --git a/arch/x86/dts/microcode/m0120661104.dtsi b/arch/x86/dts/microcode/m0120661104.dtsi new file mode 100644 index 0000000..fb2995b --- /dev/null +++ b/arch/x86/dts/microcode/m0120661104.dtsi @@ -0,0 +1,366 @@ +/* + * Copyright (c) <1995-2014>, Intel Corporation. + * All rights reserved. + * Redistribution. Redistribution and use in binary form, without modification, are + * permitted provided that the following conditions are met: + * .Redistributions must reproduce the above copyright notice and the following + * disclaimer in the documentation and/or other materials provided with the + * distribution. + * .Neither the name of Intel Corporation nor the names of its suppliers may be used + * to endorse or promote products derived from this software without specific prior + * written permission. + * .No reverse engineering, decompilation, or disassembly of this software is + * permitted. + * ."Binary form" includes any format commonly used for electronic conveyance + * which is a reversible, bit-exact translation of binary representation to ASCII or + * ISO text, for example, "uuencode." + * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT + * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --- + * This is a device tree fragment. Use #include to add these properties to a + * node. + */ + +compatible = "intel,microcode"; +intel,header-version = <1>; +intel,update-revision = <0x104>; +intel,date-code = <0x10232009>; +intel,processor-signature = <0x20661>; +intel,checksum = <0x38cb12b9>; +intel,loader-revision = <1>; +intel,processor-flags = <0x1>; + +/* The first 48-bytes are the public header which repeats the above data */ +data = < + 0x00000001 0x00000104 0x10232009 0x00020661 + 0x38cb12b9 0x00000001 0x00000001 0x000013d0 + 0x00001400 0x00000000 0x00000000 0x00000000 + 0x00000000 0x000000a1 0x00020001 0x00000104 + 0x00000017 0x000500e0 0x20091019 0x00000401 + 0x00000001 0x00020661 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x09eccda1 0x1adbcb9c 0xc2c1c2d3 0x052a20d7 + 0x37c6c23b 0xc9a271c8 0x169f18e1 0x8ca95050 + 0x0882023d 0x953684cb 0x0abe06ee 0xa7ef1798 + 0x160d6cb8 0x930cf745 0xafc3fd79 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