-----Original Message----- From: Fabio Estevam [mailto:festevam@gmail.com] Sent: Wednesday, March 14, 2012 10:57 AM To: u-boot@lists.denx.de Cc: sbabic@denx.de; eric.nelson@boundarydevices.com; dirk.behme@de.bosch.com; Liu Hui-R64343; Estevam Fabio-R49496 Subject: [PATCH v3] mx6: Read silicon revision from register
Instead of hardcoding the mx6 silicon revision, read it in run-time.
Also, besides the silicon version also print the mx6 variant type: quad, dual/solo or solo-lite.
Tested on a mx6qsabrelite, where it shows:
CPU: Freescale i.MX6Q rev1.0 at 792 MHz
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Changes since v2:
- Read both chip variant and chip silicon version from anatop
- Create a struct for accessing the anatop registers Changes since v1:
- Fix typo on Subject
arch/arm/cpu/armv7/imx-common/cpu.c | 19 +++++++++++++++++-- arch/arm/cpu/armv7/mx6/soc.c | 8 +++++++- arch/arm/include/asm/arch-mx6/imx-regs.h | 5 +++++ 3 files changed, 29 insertions(+), 3 deletions(-)
[...]
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 5ba5f39..9644807 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -294,5 +294,10 @@ struct aipstz_regs { u32 opacr4; };
+struct anatop_regs {
- u8 rsvd[0x260]; /* To be completed as needed */
- u32 siliconid;
+};
I'm afraid whether this is correct to add it here since some registers of anatop was included into the ccm_reg.
ANATOP is a collection of analog and anadig. So, ANATOP register mostly is consist of 4 parts:
ANADIG in CCM: for example: PLL/PFD, ANAREG in power: internal analog regulator, power tree. ANAUSB in usb: for usb vbus dection, charge, etc. ANAMISC: misc feature, only one register now for the Chip Silicon Version
So the siliconid is in the last register.
Jason Liu