
22 Jan
2016
22 Jan
'16
3:43 a.m.
We can use the new clk_get_by_index() function to get the correct clock.
Signed-off-by: Simon Glass sjg@chromium.org ---
Changes in v9: None Changes in v2: None
drivers/clk/clk_rk3288.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/clk_rk3288.c b/drivers/clk/clk_rk3288.c index fdc5347..d294788 100644 --- a/drivers/clk/clk_rk3288.c +++ b/drivers/clk/clk_rk3288.c @@ -541,8 +541,8 @@ static ulong rk3288_get_periph_rate(struct udevice *dev, int periph) gclk_rate = clk_get_rate(gclk); switch (periph) { case HCLK_EMMC: + case HCLK_SDMMC: case HCLK_SDIO0: - case HCLK_SDIO1: new_rate = rockchip_mmc_get_clk(priv->cru, gclk_rate, periph); break; case SCLK_SPI0:
--
2.7.0.rc3.207.g0ac5344