This patch adds set feature command (EFh) support in Freescale IFC nand controller driver.
The SET FEATURES (EFh) command is used to modify the target's default power-on behavior. This command uses one-byte feature address to determine which sub-feature parameters will be modified.
Signed-off-by: Ronak Desai ronak.desai@rockwellcollins.com --- drivers/mtd/nand/fsl_ifc_nand.c | 51 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+)
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c index c93dbb0..45cba52 100644 --- a/drivers/mtd/nand/fsl_ifc_nand.c +++ b/drivers/mtd/nand/fsl_ifc_nand.c @@ -596,6 +596,23 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command, fsl_ifc_run_command(mtd); return;
+ case NAND_CMD_SET_FEATURES: { + ifc_out32(&ifc->ifc_nand.nand_fir0, + (IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) | + (IFC_FIR_OP_UA << IFC_NAND_FIR0_OP1_SHIFT) | + (IFC_FIR_OP_WBCD << IFC_NAND_FIR0_OP2_SHIFT)); + + ifc_out32(&ifc->ifc_nand.nand_fcr0, + (NAND_CMD_SET_FEATURES << IFC_NAND_FCR0_CMD0_SHIFT)); + + ifc_out32(&ifc->ifc_nand.row3, column); + + /* Write only 4 bytes from flash buffer */ + ifc_out32(&ifc->ifc_nand.nand_fbcr, 4); + fsl_ifc_run_command(mtd); + return; + } + case NAND_CMD_RNDOUT: { __le16 Tccs = 0; chip->onfi_version ? (Tccs = chip->onfi_params.t_ccs) @@ -899,6 +916,39 @@ static int fsl_ifc_sram_init(uint32_t ver, struct fsl_ifc_mtd *priv)
return 0; } +/** + * fsl_ifc_onfi_set_features- set features for ONFI nand + * @mtd: MTD device structure + * @chip: nand chip info structure + * @addr: feature address. + * @subfeature_param: the subfeature parameters, a four bytes array. + */ +static int fsl_ifc_onfi_set_features(struct mtd_info *mtd, struct nand_chip *chip, + int addr, uint8_t *subfeature_param) +{ + int status; + int i; + +#ifdef CONFIG_SYS_NAND_ONFI_DETECTION + if (!chip->onfi_version || + !(le16_to_cpu(chip->onfi_params.opt_cmd) + & ONFI_OPT_CMD_SET_GET_FEATURES)) + return -EINVAL; +#endif + + /* Want data from start of the buffer */ + set_addr(mtd, 0, 0, 0); + + for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i) + chip->write_byte(mtd, subfeature_param[i]); + + chip->cmdfunc(mtd, NAND_CMD_SET_FEATURES, addr, 0); + + status = chip->waitfunc(mtd, chip); + if (status & NAND_STATUS_FAIL) + return -EIO; + return 0; +}
static int fsl_ifc_chip_init(int devnum, u8 *addr) { @@ -957,6 +1007,7 @@ static int fsl_ifc_chip_init(int devnum, u8 *addr) nand->select_chip = fsl_ifc_select_chip; nand->cmdfunc = fsl_ifc_cmdfunc; nand->waitfunc = fsl_ifc_wait; + nand->onfi_set_features = fsl_ifc_onfi_set_features;
/* set up nand options */ nand->bbt_td = &bbt_main_descr; -- 1.7.9.5