Re: [U-Boot] [PATCH 2/3] omap3evm: Update ethernet reset sequence for Rev.G board

Hi Sanjeev,

On 06/22/11 22:24, Sanjeev Premi wrote:

From: Sriramakrishnan srk@ti.com

The GPIO pin used for resetting the external LAN chip has changed for Rev.G board.

Signed-off-by: Sriramakrishnan srk@ti.com Signed-off-by: Sanjeev Premi premi@ti.com

---

board/ti/evm/evm.c | 27 ++++++++++++++++++--------- 1 files changed, 18 insertions(+), 9 deletions(-)

diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c index 8f9f141..57e5fa5 100644 --- a/board/ti/evm/evm.c +++ b/board/ti/evm/evm.c @@ -181,17 +181,26 @@ static void setup_net_chip(void) */ static void reset_net_chip(void) {

• struct gpio *gpio3_base = (struct gpio *)OMAP34XX_GPIO3_BASE;
• /* Make GPIO 64 as output pin */
• writel(readl(&gpio3_base->oe) & ~(GPIO0), &gpio3_base->oe);
• /* Now send a pulse on the GPIO pin */
• writel(GPIO0, &gpio3_base->setdataout);

• struct gpio *gpio_base;
• u32 pin;
• if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) {

• gpio_base = (struct gpio *)OMAP34XX_GPIO3_BASE;
  

• pin = GPIO0;	/* Output pin: GPIO Bank 3, pin 0 */
  

• } else {

• gpio_base = (struct gpio *)OMAP34XX_GPIO1_BASE;
  

• pin = GPIO7;	/* Output pin: GPIO Bank 0, pin 7 */
  

• }
• /* Configure the pin as output */
• writel(readl(&gpio_base->oe) & ~(pin), &gpio_base->oe);
• /* Send a pulse on the GPIO pin */
• writel(pin, &gpio_base->setdataout); udelay(1);

• writel(GPIO0, &gpio3_base->cleardataout);

• writel(pin, &gpio_base->cleardataout); udelay(1);

• writel(GPIO0, &gpio3_base->setdataout);

• writel(pin, &gpio_base->setdataout);

Why keep messing with the gpio registers? Why not use gpio framework? Though it is omap specific, but it will be much cleaner then the above.