Re: [U-Boot] [U-Boot, 1/1] aspeed: ast2500: Fix H-PLL and M-PLL clock rate calculation

On Mon, Jan 30, 2017 at 11:35:04AM -0800, maxims@google.com wrote:

Fix H-PLL and M-PLL rate calculation in ast2500 clock driver. Without this fix, valid setting can lead to division by zero when requesting the rate of H-PLL or M-PLL clocks.

Signed-off-by: Maxim Sloyko maxims@google.com Reviewed-by: Simon Glass sjg@chromium.org

Applied to u-boot/master, thanks!