Better to align everything with memory map described in DT to avoid mistakes. Execute both modes form the same address to make address map more understandable.
Signed-off-by: Michal Simek michal.simek@amd.com ---
board/xilinx/mbv/Kconfig | 3 +-- configs/xilinx_mbv32_defconfig | 3 +-- configs/xilinx_mbv32_smode_defconfig | 3 +-- 3 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/board/xilinx/mbv/Kconfig b/board/xilinx/mbv/Kconfig index 4bc9f72c541b..553c2320697d 100644 --- a/board/xilinx/mbv/Kconfig +++ b/board/xilinx/mbv/Kconfig @@ -13,8 +13,7 @@ config SYS_CONFIG_NAME default "xilinx_mbv"
config TEXT_BASE - default 0x80000000 if !RISCV_SMODE - default 0x80400000 if RISCV_SMODE && ARCH_RV32I + default 0x21200000
config BOARD_SPECIFIC_OPTIONS def_bool y diff --git a/configs/xilinx_mbv32_defconfig b/configs/xilinx_mbv32_defconfig index 2689495057b0..912355f42911 100644 --- a/configs/xilinx_mbv32_defconfig +++ b/configs/xilinx_mbv32_defconfig @@ -1,5 +1,4 @@ CONFIG_RISCV=y -CONFIG_TEXT_BASE=0x21200000 CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y @@ -10,7 +9,7 @@ CONFIG_DEBUG_UART_BASE=0x40600000 CONFIG_DEBUG_UART_CLOCK=1000000 CONFIG_SYS_CLK_FREQ=100000000 CONFIG_BOOT_SCRIPT_OFFSET=0x0 -CONFIG_SYS_LOAD_ADDR=0x80200000 +CONFIG_SYS_LOAD_ADDR=0x20200000 CONFIG_DEBUG_UART=y CONFIG_TARGET_XILINX_MBV=y CONFIG_FIT=y diff --git a/configs/xilinx_mbv32_smode_defconfig b/configs/xilinx_mbv32_smode_defconfig index c724d1bad742..3c911607a8d9 100644 --- a/configs/xilinx_mbv32_smode_defconfig +++ b/configs/xilinx_mbv32_smode_defconfig @@ -1,5 +1,4 @@ CONFIG_RISCV=y -CONFIG_TEXT_BASE=0x21200000 CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y @@ -10,7 +9,7 @@ CONFIG_DEBUG_UART_BASE=0x40600000 CONFIG_DEBUG_UART_CLOCK=1000000 CONFIG_SYS_CLK_FREQ=100000000 CONFIG_BOOT_SCRIPT_OFFSET=0x0 -CONFIG_SYS_LOAD_ADDR=0x80200000 +CONFIG_SYS_LOAD_ADDR=0x20200000 CONFIG_TARGET_XILINX_MBV=y CONFIG_RISCV_SMODE=y CONFIG_FIT=y