Hello Michel,
sorry for late reply...
Am 21.01.21 um 09:09 schrieb Michal Simek:
On 1/21/21 5:11 AM, Simon Glass wrote:
Hi Michal,
On Wed, 20 Jan 2021 at 08:50, Michal Simek michal.simek@xilinx.com wrote:
On 1/20/21 4:44 PM, Simon Glass wrote:
Hi Michal,
On Wed, 20 Jan 2021 at 00:46, Michal Simek michal.simek@xilinx.com wrote:
Hi,
On 1/19/21 7:54 PM, Simon Glass wrote:
Hi,
Thank you for attending!
Full notes at [1]
Tuesday 19 January 2021
Present: Daniel Schwierzeck, Heinrich Schuchardt, Michal Simek, Sean Anderson, Simon Glass, Walter Lozano
Notes: [all] Introductions [all] Timing of call
- Current time is the best across US, Europe, India. But not any good
for East Asia
- Simon might send out survey
- Send invitation to maintainer group - DONE
[Simon] New sequence numbers
I can't see any issue with it on zynqmp platform. There is only issue with i2c which was there for quite a long time that i2c mux is considered as chip on the subbus as is visible below.
Do you mean the naming of the device, or something else? What happens if you type 'i2c bus'?
If look at log below. mux is at address 74 which is i2c_mux_bus_drv and when you run i2c dev <any i2c mux channel> and run i2c probe i2c mux itself is assigned to to i2c_generic_chip_drv. Below you see it multiple times as generic_74 with ID 2/8/12/14/20. All of them are just targeting i2c mux.
That's strange. I wonder if it is failing to find it and creating multiple copies?
+Heiko Schocher too
I have never had a time to dig into this. But I expect that i2c mux enables one channel and i2c probe just correct detects all devices on bus before mux and also the whole subbus. But we are missing to check for every detected device if that address is listed already.
Me too, I have currently a heavy workload and no time to look into this issue, but it is noted on my list... and my speculation goes into the same direction.
bye, Heiko