On 2/03/2016 10:40 AM, George Broz wrote:
Sorry for the delayed response - got called away, but am back to this now. I patched socfpga_common.h and re-built the project. I picked up spl/u-boot-spl-dtb.sfp and u-boot-dtb.img and transferred them to the SD card with:
dd if=u-boot-spl-dtb.sfp of=/dev/sdf3 bs=64k seek=0 dd if=u-boot-dtb.img of=/dev/sdf3 bs=64k seek=4
Tried this with both the original DT set (socfpga.dtsi, socfpga_cyclone.dtsi, socfpga_cyclone5_sockit.dts) that came with the u-boot v2016.01 download and also an Altera-patched DT set that I've used to boot into Linux numerous times.
When I start up the board I get:
U-Boot SPL 2016.01 (Mar 01 2016 - 17:28:14) drivers/ddr/altera/sequencer.c: Preparing to start memory calibration drivers/ddr/altera/sequencer.c: CALIBRATION FAILED drivers/ddr/altera/sequencer.c: Calibration complete SDRAM calibration failed. ### ERROR ### Please RESET the board ###
I'm not a Quartus user, so I haven't done anything with the qts-filter.sh script you mentioned. Do I need to? I don't have any custom FPGA logic - it's just the Terasic board out of the box.
Thanks for any help!
Even without the custom FPGA logic the files generated from qts-filter.sh need to match your board. Sets up PLL and SDRAM parameters. I'm not familiar with the Terasic dev board ( I do have the altera devkit, but haven't used it for awhile). I'd hope the files in the git repo are correct for your board. Without the corresponding qsys project it's hard to be sure.
The sd card write commands look correct. I just used a dts files in the uboot source but modified a couple of things. Update Mem size and serial port speeds to match our requirements.
I also modified a few debug statements so the spl outputs a bit more info by default. Output is alot closer to the altera supplied uboot tree.
My spl bootup is:
U-Boot SPL 2016.01-00003-g40d1cd2 (Mar 01 2016 - 15:29:44) CLOCK: MPU 800000 kHz CLOCK: DDR 400000 kHz CLOCK: EOSC1 50000 kHz CLOCK: EOSC2 50000 kHz CLOCK: F2S_SDR_REF 0 kHz CLOCK: F2S_PER_REF 0 kHz CLOCK: MMC 50000 kHz CLOCK: QSPI 400000 kHz CLOCK: UART 100000 kHz CLOCK: SPI 200000 kHz INFO: Changing address order to 2 (row, chip, bank, column) SDRAM: Calibrating PHY SDRAM: Preparing to start memory calibration SDRAM: CALIBRATION PASSED SDRAM: Calibration complete SDRAM: 2048 MiB Trying to boot from MMC
U-Boot 2016.01-00003-g40d1cd2 (Mar 01 2016 - 15:29:44 +0800)
Marek who committed the terasic config may be able to help. It most likely a mismatch in the qts config vs hardware.