Hi Ian,
On Sat, 12 Jul 2014 14:23:41 +0100, Ian Campbell ijc@hellion.org.uk wrote:
Hi,
Marc is rather busy so I've taken it upon myself to rebase this series onto the latest master. v4 would have been applied except for a warning which it caused on aarch64 which I have (trivially) resolved this time around. The only other change is s/OBJCFLAGS/OBJCOPYFLAGS/ due to changes in the underlying code.
I'd like to get this into the next merge window since it is the basis for sunxi smp support.
I have been testing on a cubietruck (sun7i/A20). I've also build tested "./MAKEALL -v armltd" which builds a variety of 32- and 64-bit boards.
The code is also available at git://gitorious.org/ijc/u-boot.git psci-v5
The sunxi patches which build on this are at git://gitorious.org/ijc/u-boot.git psci-a20-v5
Cheers, Ian.
Marc's original blurb:
PSCI is an ARM standard that provides a generic interface that supervisory software can use to manage power in the following situations:
- Core idle management
- CPU hotplug
- big.LITTLE migration models
- System shutdown and reset
It basically allows the kernel to offload these tasks to the firmware, and rely on common kernel side code that just calls into PSCI.
More importantly, it gives a way to ensure that CPUs enter the kernel at the appropriate exception level (ie HYP mode, to allow the use of the virtualization extensions), even across events like CPUs being powered off/on or suspended.
The main idea here is to turn some of the existing U-Boot code into a separate section that can live in secure RAM (or a reserved page of memory), containing a secure monitor that will implement the PSCI operations. This code will still be alive when U-Boot is long gone, hence the need for a piece of memory that will not be touched by the OS.
This patch series contains 3 parts:
- the first four patches are just bug fixes
- the next two refactor the HYP/non-secure code to allow relocation in secure memory
- the last four contain the generic PSCI code and DT infrastructure
This implements the original 0.1 spec, as nobody implements the new 0.2 version so far. I plan to update this support to 0.2 once there is an official binding available (and support in the kernel).
Most of the development has been done on an Allwinner A20 SoC, which is the main user of this code at the moment. I hope new SoCs will be using this method in the future (my primary goal for this series being to avoid more stupid SMP code from creeping up in the Linux kernel). As instructed, I've removed the A20 support code and made it a separate series, as there is now an effort to mainline this code (see Ian Campbell patch series).
With these three series applied, the A20 now boots in HYP mode, Linux finds the secondary CPU without any SMP code present in the kernel, and runs KVM out of the box. The Xen/ARM guys managed to do the same fairly easily, as did at least one XVizor user.
This code has also been tested on a VExpress TC2, running KVM with all 5 CPUs, in order to make sure there was no obvious regression.
Whole series applied to u-boot-arm/master, thanks!
Amicalement,