[U-Boot-Users] Question on ECC SDRAM initialization in PPC4xx

In the ppc4xx cpu source files, I see that ECC for SDRAM is supported. The code checks some settings ((read_spd(11)==2) && (read_spd(6)==40) && (read_spd(14)==8) and then enables ECC on the processor.

*Does this automatically detect the presence of a SDRAM chips connected in an ECC configuration?* Are additional software configuration settings needed before this point to enable ECC?

SOURCE ./cpu/ppc4xx/spd_sdram.c

/* now check for ECC ability of module. We only support ECC * on 32 bit wide devices with 8 bit ECC. */ if ((read_spd(11)==2) && (read_spd(6)==40) && (read_spd(14)==8)) { sdram0_ecccfg = 0xf << SDRAM0_ECCCFG_SHIFT; ecc_on = 1; } else { sdram0_ecccfg = 0; ecc_on = 0; }

Thanks, Jeff