The DA8xx chips have two modules PSC0 and PSC1 for the local power and sleep controllers (LPSC). Each LPSC has up to 32 submodules over which it has control, which are enumerated by the DAVINCI_LPSC_* symbols.
This commit fixes the definitions of a number of symbols to be consistent with both the OMAP-L137 and OMAP-L138 data sheets (TI documents SPRS563D and SPRS586A respectively): some minor renaming to reflect actual functionality and some reordering of modules in PSC1 to be correct.
None of the affected symbols were actually used anywhere in the code, so there are no related code changes.
Signed-off-by: Laurence Withers lwithers@guralp.com Cc: Sandeep Paulraj s-paulraj@ti.com --- Changes for v2: - Fixed formatting of commit message. --- arch/arm/include/asm/arch-davinci/hardware.h | 29 +++++++++++++++++--------- 1 files changed, 19 insertions(+), 10 deletions(-)
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h index df3f549..d0a3036 100644 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ b/arch/arm/include/asm/arch-davinci/hardware.h @@ -214,12 +214,12 @@ typedef volatile unsigned int * dv_reg_p; #else /* CONFIG_SOC_DA8XX */
enum davinci_lpsc_ids { - DAVINCI_LPSC_TPCC = 0, + DAVINCI_LPSC_TPCC0 = 0, DAVINCI_LPSC_TPTC0, DAVINCI_LPSC_TPTC1, DAVINCI_LPSC_AEMIF, DAVINCI_LPSC_SPI0, - DAVINCI_LPSC_MMC_SD, + DAVINCI_LPSC_MMC_SD0, DAVINCI_LPSC_AINTC, DAVINCI_LPSC_ARM_RAM_ROM, DAVINCI_LPSC_SECCTL_KEYMGR, @@ -227,31 +227,40 @@ enum davinci_lpsc_ids { DAVINCI_LPSC_SCR0, DAVINCI_LPSC_SCR1, DAVINCI_LPSC_SCR2, - DAVINCI_LPSC_DMAX, + DAVINCI_LPSC_PRUSS, DAVINCI_LPSC_ARM, DAVINCI_LPSC_GEM, /* for LPSCs in PSC1, offset from 32 for differentiation */ DAVINCI_LPSC_PSC1_BASE = 32, - DAVINCI_LPSC_USB11, + DAVINCI_LPSC_TPCC1 = 32, DAVINCI_LPSC_USB20, + DAVINCI_LPSC_USB11, DAVINCI_LPSC_GPIO, DAVINCI_LPSC_UHPI, DAVINCI_LPSC_EMAC, DAVINCI_LPSC_DDR_EMIF, DAVINCI_LPSC_McASP0, - DAVINCI_LPSC_McASP1, - DAVINCI_LPSC_McASP2, + DAVINCI_LPSC_McASP1_SATA, + DAVINCI_LPSC_McASP2_VPIF, DAVINCI_LPSC_SPI1, DAVINCI_LPSC_I2C1, DAVINCI_LPSC_UART1, DAVINCI_LPSC_UART2, + DAVINCI_LPSC_McBSP0, + DAVINCI_LPSC_McBSP1, DAVINCI_LPSC_LCDC, DAVINCI_LPSC_ePWM, + DAVINCI_LPSC_MMC_SD1, + DAVINCI_LPSC_uPP, DAVINCI_LPSC_eCAP, - DAVINCI_LPSC_eQEP, - DAVINCI_LPSC_SCR_P0, - DAVINCI_LPSC_SCR_P1, - DAVINCI_LPSC_CR_P3, + DAVINCI_LPSC_eQEP_TPTC2, + DAVINCI_LPSC_SCR_F0 = 56, + DAVINCI_LPSC_SCR_F1, + DAVINCI_LPSC_SCR_F2, + DAVINCI_LPSC_SCR_F6, + DAVINCI_LPSC_SCR_F7, + DAVINCI_LPSC_SCR_F8, + DAVINCI_LPSC_BR_F7, DAVINCI_LPSC_L3_CBA_RAM };