Without this definition, fsl_esdhc will access reserved registers on i.MX chips, so define ARCH_MXC to fix it.
Signed-off-by: Peng Fan peng.fan@nxp.com ---
CI: https://travis-ci.org/MrVan/u-boot/builds/530082356
arch/arm/include/asm/arch-imx8/imx-regs.h | 2 ++ arch/arm/include/asm/arch-imx8m/imx-regs.h | 2 ++ arch/arm/include/asm/arch-mx7ulp/imx-regs.h | 2 ++ 3 files changed, 6 insertions(+)
diff --git a/arch/arm/include/asm/arch-imx8/imx-regs.h b/arch/arm/include/asm/arch-imx8/imx-regs.h index af0fb5154b..6333ff4686 100644 --- a/arch/arm/include/asm/arch-imx8/imx-regs.h +++ b/arch/arm/include/asm/arch-imx8/imx-regs.h @@ -6,6 +6,8 @@ #ifndef __ASM_ARCH_IMX8_REGS_H__ #define __ASM_ARCH_IMX8_REGS_H__
+#define ARCH_MXC + #define LPUART_BASE 0x5A060000
#define GPT1_BASE_ADDR 0x5D140000 diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h index 3facd5450c..68666a535b 100644 --- a/arch/arm/include/asm/arch-imx8m/imx-regs.h +++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h @@ -6,6 +6,8 @@ #ifndef __ASM_ARCH_IMX8M_REGS_H__ #define __ASM_ARCH_IMX8M_REGS_H__
+#define ARCH_MXC + #include <asm/mach-imx/regs-lcdif.h>
#define ROM_VERSION_A0 0x800 diff --git a/arch/arm/include/asm/arch-mx7ulp/imx-regs.h b/arch/arm/include/asm/arch-mx7ulp/imx-regs.h index bf9f39aca2..63b02de087 100644 --- a/arch/arm/include/asm/arch-mx7ulp/imx-regs.h +++ b/arch/arm/include/asm/arch-mx7ulp/imx-regs.h @@ -8,6 +8,8 @@
#include <linux/sizes.h>
+#define ARCH_MXC + #define CAAM_SEC_SRAM_BASE (0x26000000) #define CAAM_SEC_SRAM_SIZE (SZ_32K) #define CAAM_SEC_SRAM_END (CAAM_SEC_SRAM_BASE + CAAM_SEC_SRAM_SIZE - 1)