24 Jul
2019
24 Jul
'19
9:45 a.m.
On Wed, Jul 24, 2019 at 9:31 AM Marek Vasut marex@denx.de wrote:
On 7/23/19 10:27 PM, Simon Goldschmidt wrote:
This adds clk-gen5 as a readonly DM_CLK driver that can return clocks for the peripherals.
Further changes are:
- select DM_CLK for gen5 U-Boot and SPL
- add SPL tags to clock nodes in socfpga-common-u-boot.dtsi
- adjust socfpga.dtsi to provide missing src selection registers
- start 'handoff.dtsi' file for socrates (conatains clock speeds for now)
These should likely be separate patches then ?
Well, in the end, yes. Especially the handoff.dtsi is required for *all* socfpga_gen5 boards, so I'll need to adapt the 'qts-filter.sh' script to generate it.
I'll change that script and separate these patches in v2.
Regards, Simon
[...]